Re: looking for help on gpio setup on orange pi one - SOME SORT OF SUCCESS

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Re: looking for help on gpio setup on orange pi one - SOME SORT OF SUCCESS

Stephen Graf
Thank you for all your help and time so far.

I am an engineer by training and profession and In school we always jokingly
used to say
"If all else fails use brute force (F!)".

So to try out your theory I conducted the following test.  I added a line to
sxipio.c:


                /* Get pin configuration. */
                reg = SXIREAD4(sc, SXIPIO_CFG(port, pin));
                off = (pin & 0x7) << 2;
                cfg = (reg >> off) & 0x7;

if(cfg == 7) cfg = 0;

                for (m = 0; m < 8; m++)
                        if (sc->sc_pins[i].funcs[m].mux == cfg)
                                break;

                printf("%c%d mux %d<%s>%s", 'A' +
(u_int)sc->sc_pins[i].port,
                    sc->sc_pins[i].pin, cfg,
                    m >= 8 ? "invalid" : sc->sc_pins[i].funcs[m].name,
                    cfg < 2 ? "- adding\n" : "- skipping\n");


                /* Skip pins that have been assigned other functions. */


and got the results below:


Trying to boot from MMC1


U-Boot 2017.09-rc2 (Aug 22 2017 - 00:26:16 -0600) Allwinner Technology

CPU:   Allwinner H3 (SUN8I 1680)
Model: Xunlong Orange Pi One
DRAM:  512 MiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   phy interface0
eth0: ethernet@1c30000
starting USB...
USB0:   USB EHCI 1.00
USB1:   USB OHCI 1.0
scanning bus 0 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
reading /sun8i-h3-orangepi-one.dtb
14504 bytes read in 25 ms (566.4 KiB/s)
Found EFI removable media binary efi/boot/bootarm.efi
reading efi/boot/bootarm.efi
67356 bytes read in 36 ms (1.8 MiB/s)
## Starting EFI application at 42000000 ...
Scanning disks on usb...
Scanning disks on mmc...
MMC Device 1 not found
MMC Device 2 not found
MMC Device 3 not found
Found 5 disks
>> OpenBSD/armv7 BOOTARM 1.0
boot>
booting sd0a:/bsd: 3906928+165972+496428 [282683+90+518560+243869]=0x56101c

OpenBSD/armv7 booting ...
arg0 0xc086101c arg1 0x0 arg2 0x48000000
Allocating page tables
freestart = 0x40862000, free_pages = 128926 (0x0001f79e)
IRQ stack: p0x40890000 v0xc0890000
ABT stack: p0x40891000 v0xc0891000
UND stack: p0x40892000 v0xc0892000
SVC stack: p0x40893000 v0xc0893000
Creating L1 page table at 0x40864000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 1045660 bytes of bsd ELF symbol table ]
board type: 0
Copyright (c) 1982, 1986, 1989, 1991, 1993
        The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2017 OpenBSD. All rights reserved.
https://www.OpenBSD.org

OpenBSD 6.2-beta (GENERIC) #6: Mon Aug 28 19:01:57 PDT 2017
    [hidden email]:/usr/src/sys/arch/armv7/compile/GENERIC
real mem  = 536870912 (512MB)
avail mem = 517378048 (493MB)
mainbus0 at root: Xunlong Orange Pi One
cpu0 at mainbus0: ARM Cortex-A7 r0p5 (ARMv7)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
cortex0 at mainbus0
sxiccmu0 at mainbus0
psci0 at mainbus0
simplebus0 at mainbus0: "soc"
sxiccmu1 at simplebus0
sxipio0 at simplebus0: 94 pins
sxipio1 at simplebus0: 12 pins
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev
2.00/1.00 addr 1
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev
2.00/1.00 addr 1
sxidog0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
ampintc0 at simplebus0 nirq 160, ncpu 4
sxirtc0 at simplebus0
A0 mux 0<gpio_in>- adding
A1 mux 0<gpio_in>- adding
A2 mux 0<gpio_in>- adding
A3 mux 0<gpio_in>- adding
A4 mux 2<uart0>- skipping
A5 mux 2<uart0>- skipping
A6 mux 0<gpio_in>- adding
A7 mux 0<gpio_in>- adding
A8 mux 0<gpio_in>- adding
A9 mux 0<gpio_in>- adding
A10 mux 0<gpio_in>- adding
A11 mux 0<gpio_in>- adding
A12 mux 0<gpio_in>- adding
A13 mux 0<gpio_in>- adding
A14 mux 0<gpio_in>- adding
A15 mux 0<gpio_in>- adding
A16 mux 0<gpio_in>- adding
A17 mux 0<gpio_in>- adding
A18 mux 0<gpio_in>- adding
A19 mux 0<gpio_in>- adding
A20 mux 0<gpio_in>- adding
A21 mux 0<gpio_in>- adding
C0 mux 0<gpio_in>- adding
C1 mux 0<gpio_in>- adding
C2 mux 0<gpio_in>- adding
C3 mux 0<gpio_in>- adding
C4 mux 0<gpio_in>- adding
C5 mux 0<gpio_in>- adding
C6 mux 0<gpio_in>- adding
C7 mux 0<gpio_in>- adding
C8 mux 0<gpio_in>- adding
C9 mux 0<gpio_in>- adding
C10 mux 0<gpio_in>- adding
C11 mux 0<gpio_in>- adding
C12 mux 0<gpio_in>- adding
C13 mux 0<gpio_in>- adding
C14 mux 0<gpio_in>- adding
C15 mux 0<gpio_in>- adding
C16 mux 0<gpio_in>- adding
D0 mux 0<gpio_in>- adding
D1 mux 0<gpio_in>- adding
D2 mux 0<gpio_in>- adding
D3 mux 0<gpio_in>- adding
D4 mux 0<gpio_in>- adding
D5 mux 0<gpio_in>- adding
D6 mux 0<gpio_in>- adding
D7 mux 0<gpio_in>- adding
D8 mux 0<gpio_in>- adding
D9 mux 0<gpio_in>- adding
D10 mux 0<gpio_in>- adding
D11 mux 0<gpio_in>- adding
D12 mux 0<gpio_in>- adding
D13 mux 0<gpio_in>- adding
D14 mux 0<gpio_in>- adding
D15 mux 0<gpio_in>- adding
D16 mux 0<gpio_in>- adding
D17 mux 0<gpio_in>- adding
E0 mux 0<gpio_in>- adding
E1 mux 0<gpio_in>- adding
E2 mux 0<gpio_in>- adding
E3 mux 0<gpio_in>- adding
E4 mux 0<gpio_in>- adding
E5 mux 0<gpio_in>- adding
E6 mux 0<gpio_in>- adding
E7 mux 0<gpio_in>- adding
E8 mux 0<gpio_in>- adding
E9 mux 0<gpio_in>- adding
E10 mux 0<gpio_in>- adding
E11 mux 0<gpio_in>- adding
E12 mux 0<gpio_in>- adding
E13 mux 0<gpio_in>- adding
E14 mux 0<gpio_in>- adding
E15 mux 0<gpio_in>- adding
F0 mux 2<mmc0>- skipping
F1 mux 2<mmc0>- skipping
F2 mux 2<mmc0>- skipping
F3 mux 2<mmc0>- skipping
F4 mux 2<mmc0>- skipping
F5 mux 2<mmc0>- skipping
F6 mux 0<gpio_in>- adding
G0 mux 0<gpio_in>- adding
G1 mux 0<gpio_in>- adding
G2 mux 0<gpio_in>- adding
G3 mux 0<gpio_in>- adding
G4 mux 0<gpio_in>- adding
G5 mux 0<gpio_in>- adding
G6 mux 0<gpio_in>- adding
G7 mux 0<gpio_in>- adding
G8 mux 0<gpio_in>- adding
G9 mux 0<gpio_in>- adding
G10 mux 0<gpio_in>- adding
G11 mux 0<gpio_in>- adding
G12 mux 0<gpio_in>- adding
G13 mux 0<gpio_in>- adding
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
A0 mux 0<gpio_in>- adding
A1 mux 0<gpio_in>- adding
A2 mux 0<gpio_in>- adding
A3 mux 0<gpio_in>- adding
A4 mux 0<gpio_in>- adding
A5 mux 0<gpio_in>- adding
A6 mux 0<gpio_in>- adding
A7 mux 0<gpio_in>- adding
A8 mux 0<gpio_in>- adding
A9 mux 0<gpio_in>- adding
A10 mux 0<gpio_in>- adding
A11 mux 0<gpio_in>- adding
gpio7 at sxipio1: 32 pins
agtimer0 at mainbus0: tick rate 24000 KHz
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SL16G, 0080> SCSI2 0/direct removable
sd0: 15193MB, 512 bytes/sector, 31116288 sectors
run0 at uhub1 port 1 configuration 1 interface 0 "Ralink 802.11 n WLAN" rev
2.00/1.01 addr 2
run0: MAC/BBP RT3070 (rev 0x0201), RF RT3020 (MIMO 1T1R), address
00:1f:cf:52:86:52
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
boot device: sd0
root on sd0a (e50fea1f8609b974.a) swap on sd0b dump on sd0b
Automatic boot in progress: starting file system checks.
/dev/sd0a (e50fea1f8609b974.a): file system is clean; not checking
/dev/sd0l (e50fea1f8609b974.l): file system is clean; not checking
/dev/sd0d (e50fea1f8609b974.d): file system is clean; not checking
/dev/sd0f (e50fea1f8609b974.f): file system is clean; not checking
/dev/sd0g (e50fea1f8609b974.g): file system is clean; not checking
/dev/sd0h (e50fea1f8609b974.h): file system is clean; not checking
/dev/sd0k (e50fea1f8609b974.k): file system is clean; not checking
/dev/sd0j (e50fea1f8609b974.j): file system is clean; not checking
/dev/sd0e (e50fea1f8609b974.e): file system is clean; not checking
setting tty flags
pf enabled
starting network
DHCPREQUEST on run0 to 255.255.255.255
DHCPACK from 192.168.1.253 (cc:5d:4e:ad:f4:0f)
bound to 192.168.1.6 -- renewal in 43200 seconds.
reordering libraries: done.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
In rc.securelevel, setting gpio.
PA15
pin 15: caps: in out, flags: in -> out
PD14
pin 14: caps: in out, flags: in -> out
PL10
pin 10: caps: in out, flags: in -> out
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd sndiod.
starting local daemons: cron.
Mon Aug 28 20:45:24 PDT 2017

OpenBSD/armv7 (openbsdop1.graf.lan) (console)

login: sysadmin
Password:
Last login: Mon Aug 28 20:36:25 on ttyp0 from 192.168.1.3
OpenBSD 6.2-beta (GENERIC) #6: Mon Aug 28 19:01:57 PDT 2017

Welcome to OpenBSD: The proactively secure Unix-like operating system.

Please use the sendbug(1) utility to report bugs in the system.
Before reporting a bug, please try to reproduce it with the latest
version of the code.  With bug reports, please try to ensure that
enough information to reproduce the problem is enclosed, and if a
known fix for it exists, include that as well.

You have new mail.
$ su
Password:

# gpioctl gpio0 15 toggle
pin 15: state 0 -> 1
# gpioctl gpio0 15 toggle
pin 15: state 1 -> 0
# gpioctl gpio0 15 toggle
pin 15: state 0 -> 1
# gpioctl gpio0 15 toggle
pin 15: state 1 -> 0
# gpioctl gpio0 15 toggle
pin 15: state 0 -> 1
# gpioctl gpio0 15 toggle
pin 15: state 1 -> 0
#

And the red light goes on and off!

-----Original Message-----
From: [hidden email] [mailto:[hidden email]] On Behalf Of Mark
Kettenis
Sent: Monday, August 28, 2017 11:05 AM
To: [hidden email]
Cc: [hidden email]; [hidden email]
Subject: Re: looking for help on gpio setup on orange pi one

> From: "Stephen Graf" <[hidden email]>
> Date: Mon, 28 Aug 2017 10:30:51 -0700
>
> I tied your suggested change with the following results.
> Not yet what I am thinking is correct.

> sxirtc0 at simplebus0
> A0 mux 7<invalid>- skipping
> A1 mux 7<invalid>- skipping
> A2 mux 7<invalid>- skipping
> A3 mux 7<invalid>- skipping
> A4 mux 2<uart0>- skipping
> A5 mux 2<uart0>- skipping
> A6 mux 7<invalid>- skipping
> A7 mux 7<invalid>- skipping
> A8 mux 7<invalid>- skipping
> A9 mux 7<invalid>- skipping
> A10 mux 7<invalid>- skipping
> A11 mux 7<invalid>- skipping
> A12 mux 7<invalid>- skipping
> A13 mux 7<invalid>- skipping
> A14 mux 7<invalid>- skipping
> A15 mux 7<invalid>- skipping
> A16 mux 7<invalid>- skipping
> A17 mux 7<invalid>- skipping
> A18 mux 7<invalid>- skipping
> A19 mux 7<invalid>- skipping
> A20 mux 7<invalid>- skipping
> A21 mux 7<invalid>- skipping
> C0 mux 7<invalid>- skipping
> C1 mux 7<invalid>- skipping
> C2 mux 7<invalid>- skipping
> C3 mux 7<invalid>- skipping
> C4 mux 7<invalid>- skipping
> C5 mux 7<invalid>- skipping
> C6 mux 7<invalid>- skipping
> C7 mux 7<invalid>- skipping
> C8 mux 7<invalid>- skipping
> C9 mux 7<invalid>- skipping
> C10 mux 7<invalid>- skipping
> C11 mux 7<invalid>- skipping
> C12 mux 7<invalid>- skipping
> C13 mux 7<invalid>- skipping
> C14 mux 7<invalid>- skipping
> C15 mux 7<invalid>- skipping
> C16 mux 7<invalid>- skipping
> D0 mux 7<invalid>- skipping
> D1 mux 7<invalid>- skipping
> D2 mux 7<invalid>- skipping
> D3 mux 7<invalid>- skipping
> D4 mux 7<invalid>- skipping
> D5 mux 7<invalid>- skipping
> D6 mux 7<invalid>- skipping
> D7 mux 7<invalid>- skipping
> D8 mux 7<invalid>- skipping
> D9 mux 7<invalid>- skipping
> D10 mux 7<invalid>- skipping
> D11 mux 7<invalid>- skipping
> D12 mux 7<invalid>- skipping
> D13 mux 7<invalid>- skipping
> D14 mux 7<invalid>- skipping
> D15 mux 7<invalid>- skipping
> D16 mux 7<invalid>- skipping
> D17 mux 7<invalid>- skipping
> E0 mux 7<invalid>- skipping
> E1 mux 7<invalid>- skipping
> E2 mux 7<invalid>- skipping
> E3 mux 7<invalid>- skipping
> E4 mux 7<invalid>- skipping
> E5 mux 7<invalid>- skipping
> E6 mux 7<invalid>- skipping
> E7 mux 7<invalid>- skipping
> E8 mux 7<invalid>- skipping
> E9 mux 7<invalid>- skipping
> E10 mux 7<invalid>- skipping
> E11 mux 7<invalid>- skipping
> E12 mux 7<invalid>- skipping
> E13 mux 7<invalid>- skipping
> E14 mux 7<invalid>- skipping
> E15 mux 7<invalid>- skipping
> F0 mux 2<mmc0>- skipping
> F1 mux 2<mmc0>- skipping
> F2 mux 2<mmc0>- skipping
> F3 mux 2<mmc0>- skipping
> F4 mux 2<mmc0>- skipping
> F5 mux 2<mmc0>- skipping
> F6 mux 0<gpio_in>- adding
> G0 mux 7<invalid>- skipping
> G1 mux 7<invalid>- skipping
> G2 mux 7<invalid>- skipping
> G3 mux 7<invalid>- skipping
> G4 mux 7<invalid>- skipping
> G5 mux 7<invalid>- skipping
> G6 mux 7<invalid>- skipping
> G7 mux 7<invalid>- skipping
> G8 mux 7<invalid>- skipping
> G9 mux 7<invalid>- skipping
> G10 mux 7<invalid>- skipping
> G11 mux 7<invalid>- skipping
> G12 mux 7<invalid>- skipping
> G13 mux 7<invalid>- skipping
> gpio0 at sxipio0: 32 pins
> gpio1 at sxipio0: 32 pins
> gpio2 at sxipio0: 32 pins
> gpio3 at sxipio0: 32 pins
> gpio4 at sxipio0: 32 pins
> gpio5 at sxipio0: 32 pins
> gpio6 at sxipio0: 32 pins
> A0 mux 7<invalid>- skipping
> A1 mux 7<invalid>- skipping
> A2 mux 7<invalid>- skipping
> A3 mux 7<invalid>- skipping
> A4 mux 7<invalid>- skipping
> A5 mux 7<invalid>- skipping
> A6 mux 7<invalid>- skipping
> A7 mux 7<invalid>- skipping
> A8 mux 7<invalid>- skipping
> A9 mux 7<invalid>- skipping
> A10 mux 7<invalid>- skipping
> A11 mux 7<invalid>- skipping
> gpio7 at sxipio1: 32 pins

Actually this starts to make sense.  If you look at page 316 and further of
the H3 data sheet:

  http://linux-sunxi.org/images/4/4b/Allwinner_H3_Datasheet_V1.2.pdf

you'll see that the pins most pins come up in state 7 "IO disable".  I think
we can allow configurtion of pins thet are left in this state without too
much risk.

I don't have much time to look into this right now myself.  But please
remind me in the 2nd half of september if nothing happens before then.


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Re: looking for help on gpio setup on orange pi one - SOME SORT OF SUCCESS

Mark Kettenis
I just committed a fix for the bug that Arturri noticed.  And here is
a diff on top of that that hopefully makes it possible to configure
pins that have not been touched by the firmware or OpenBSD on the
newer Allwinner SoCs.

Can you try this?  You may need to wait a bit for my commit to
propagate to your favourite mirror.

Cheers,

Mark


Index: sxipio.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/sxipio.c,v
retrieving revision 1.1
diff -u -p -r1.1 sxipio.c
--- sxipio.c 21 Jan 2017 08:26:49 -0000 1.1
+++ sxipio.c 1 May 2017 20:48:50 -0000
@@ -206,6 +206,36 @@ sxipio_attach(struct device *parent, str
  printf(": %d pins\n", sc->sc_npins);
 }
 
+int
+sxipio_drive(int node)
+{
+ int drive;
+
+ drive = OF_getpropint(node, "allwinner,drive", -1);
+ if (drive >= 0)
+ return drive;
+ drive = OF_getpropint(node, "drive-strength", 0) - 10;
+ if (drive >= 0)
+ return (drive / 10);
+ return -1;
+}
+
+int
+sxipio_pull(int node)
+{
+ int pull;
+
+ pull = OF_getpropint(node, "allwinner,pull", -1);
+ if (pull >= 0)
+ return pull;
+ if (OF_getproplen(node, "bias-disable") == 0)
+ return 0;
+ if (OF_getproplen(node, "bias-pull-up") == 0)
+ return 1;
+ if (OF_getproplen(node, "bias-pull-down") == 0)
+ return 2;
+ return -1;
+}
 
 int
 sxipio_pinctrl(uint32_t phandle, void *cookie)
@@ -213,7 +243,7 @@ sxipio_pinctrl(uint32_t phandle, void *c
  struct sxipio_softc *sc = cookie;
  char func[32];
  char *names, *name;
- int port, pin, off;
+ int port, pin, off, mask;
  int mux, drive, pull;
  int node;
  int len;
@@ -225,18 +255,25 @@ sxipio_pinctrl(uint32_t phandle, void *c
  return -1;
 
  len = OF_getprop(node, "allwinner,function", func, sizeof(func));
- if (len <= 0 || len >= sizeof(func))
- return -1;
+ if (len <= 0 || len >= sizeof(func)) {
+ len = OF_getprop(node, "function", func, sizeof(func));
+ if (len <= 0 || len >= sizeof(func))
+ return -1;
+ }
 
  len = OF_getproplen(node, "allwinner,pins");
- if (len <= 0)
- return -1;
+ if (len <= 0) {
+ len = OF_getproplen(node, "pins");
+ if (len <= 0)
+ return -1;
+ }
 
  names = malloc(len, M_TEMP, M_WAITOK);
- OF_getprop(node, "allwinner,pins", names, len);
+ if (OF_getprop(node, "allwinner,pins", names, len) <= 0)
+ OF_getprop(node, "pins", names, len);
 
- drive = OF_getpropint(node, "allwinner,drive", 0);
- pull = OF_getpropint(node, "allwinner,pull", 0);
+ drive = sxipio_drive(node);
+ pull = sxipio_pull(node);
 
  name = names;
  while (len > 0) {
@@ -261,11 +298,13 @@ sxipio_pinctrl(uint32_t phandle, void *c
  mux = sc->sc_pins[i].funcs[j].mux;
 
  s = splhigh();
- off = (pin & 0x7) << 2;
- SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
- off = (pin & 0xf) << 1;
- SXICMS4(sc, SXIPIO_DRV(port, pin), 0x3 << off, drive << off);
- SXICMS4(sc, SXIPIO_PUL(port, pin), 0x3 << off, pull << off);
+ off = (pin & 0x7) << 2, mask = (0x7 << off);
+ SXICMS4(sc, SXIPIO_CFG(port, pin), mask, mux << off);
+ off = (pin & 0xf) << 1, mask = (0x3 << off);
+ if (drive >= 0 && drive < 4)
+ SXICMS4(sc, SXIPIO_DRV(port, pin), mask, drive << off);
+ if (pull >= 0 && pull < 3)
+ SXICMS4(sc, SXIPIO_PUL(port, pin), mask, pull << off);
  splx(s);
 
  len -= strlen(name) + 1;

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Re: looking for help on gpio setup on orange pi one - SOME SORT OF SUCCESS

Stephen Graf
In reply to this post by Stephen Graf
Thank you. Will do.

-----Original Message-----
From: [hidden email] [mailto:[hidden email]] On Behalf Of Mark
Kettenis
Sent: Wednesday, August 30, 2017 9:41 AM
To: [hidden email]
Cc: [hidden email]; [hidden email]; [hidden email]
Subject: Re: looking for help on gpio setup on orange pi one - SOME SORT OF
SUCCESS

I just committed a fix for the bug that Arturri noticed.  And here is a diff
on top of that that hopefully makes it possible to configure pins that have
not been touched by the firmware or OpenBSD on the newer Allwinner SoCs.

Can you try this?  You may need to wait a bit for my commit to propagate to
your favourite mirror.

Cheers,

Mark


Index: sxipio.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/sxipio.c,v retrieving revision 1.1 diff -u -p
-r1.1 sxipio.c
--- sxipio.c 21 Jan 2017 08:26:49 -0000 1.1
+++ sxipio.c 1 May 2017 20:48:50 -0000
@@ -206,6 +206,36 @@ sxipio_attach(struct device *parent, str
  printf(": %d pins\n", sc->sc_npins);
 }
 
+int
+sxipio_drive(int node)
+{
+ int drive;
+
+ drive = OF_getpropint(node, "allwinner,drive", -1);
+ if (drive >= 0)
+ return drive;
+ drive = OF_getpropint(node, "drive-strength", 0) - 10;
+ if (drive >= 0)
+ return (drive / 10);
+ return -1;
+}
+
+int
+sxipio_pull(int node)
+{
+ int pull;
+
+ pull = OF_getpropint(node, "allwinner,pull", -1);
+ if (pull >= 0)
+ return pull;
+ if (OF_getproplen(node, "bias-disable") == 0)
+ return 0;
+ if (OF_getproplen(node, "bias-pull-up") == 0)
+ return 1;
+ if (OF_getproplen(node, "bias-pull-down") == 0)
+ return 2;
+ return -1;
+}
 
 int
 sxipio_pinctrl(uint32_t phandle, void *cookie) @@ -213,7 +243,7 @@
sxipio_pinctrl(uint32_t phandle, void *c
  struct sxipio_softc *sc = cookie;
  char func[32];
  char *names, *name;
- int port, pin, off;
+ int port, pin, off, mask;
  int mux, drive, pull;
  int node;
  int len;
@@ -225,18 +255,25 @@ sxipio_pinctrl(uint32_t phandle, void *c
  return -1;
 
  len = OF_getprop(node, "allwinner,function", func, sizeof(func));
- if (len <= 0 || len >= sizeof(func))
- return -1;
+ if (len <= 0 || len >= sizeof(func)) {
+ len = OF_getprop(node, "function", func, sizeof(func));
+ if (len <= 0 || len >= sizeof(func))
+ return -1;
+ }
 
  len = OF_getproplen(node, "allwinner,pins");
- if (len <= 0)
- return -1;
+ if (len <= 0) {
+ len = OF_getproplen(node, "pins");
+ if (len <= 0)
+ return -1;
+ }
 
  names = malloc(len, M_TEMP, M_WAITOK);
- OF_getprop(node, "allwinner,pins", names, len);
+ if (OF_getprop(node, "allwinner,pins", names, len) <= 0)
+ OF_getprop(node, "pins", names, len);
 
- drive = OF_getpropint(node, "allwinner,drive", 0);
- pull = OF_getpropint(node, "allwinner,pull", 0);
+ drive = sxipio_drive(node);
+ pull = sxipio_pull(node);
 
  name = names;
  while (len > 0) {
@@ -261,11 +298,13 @@ sxipio_pinctrl(uint32_t phandle, void *c
  mux = sc->sc_pins[i].funcs[j].mux;
 
  s = splhigh();
- off = (pin & 0x7) << 2;
- SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
- off = (pin & 0xf) << 1;
- SXICMS4(sc, SXIPIO_DRV(port, pin), 0x3 << off, drive <<
off);
- SXICMS4(sc, SXIPIO_PUL(port, pin), 0x3 << off, pull << off);
+ off = (pin & 0x7) << 2, mask = (0x7 << off);
+ SXICMS4(sc, SXIPIO_CFG(port, pin), mask, mux << off);
+ off = (pin & 0xf) << 1, mask = (0x3 << off);
+ if (drive >= 0 && drive < 4)
+ SXICMS4(sc, SXIPIO_DRV(port, pin), mask, drive <<
off);
+ if (pull >= 0 && pull < 3)
+ SXICMS4(sc, SXIPIO_PUL(port, pin), mask, pull <<
off);
  splx(s);
 
  len -= strlen(name) + 1;