OpenBSD-6.6 and later on Orange Pi PC

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OpenBSD-6.6 and later on Orange Pi PC

SASANO Takayoshi
Hi,

I found OpenBSD/armv7 bsd.rd cannot boot on OrangePi PC since 6.6 to -current.
At least 6.5 works good.

Here is the log of bsd.rd and 6.7 and -current do same thing.

----

>> OpenBSD/armv7 BOOTARM 1.6
boot> boot bsd.rd
cannot open sd0a:/etc/random.seed: No such file or directory
booting sd0a:bsd.rd: 2199980+461772+8065552+452300 [191791+120+347120+188040]=0x0
EHCI failed to shut down host controller.

OpenBSD/armv7 booting ...
arg0 0xc0e5c360 arg1 0x0 arg2 0x47ef7000
Allocating page tables
IRQ stack: p0x40e8b000 v0xc0e8b000
ABT stack: p0x40e8c000 v0xc0e8c000
UND stack: p0x40e8d000 v0xc0e8d000
SVC stack: p0x40e8e000 v0xc0e8e000
Creating L1 page table at 0x40e60000
Mapping kernel
Constructing L2 page tables
undefined page type 0x2 pa 0x40000000 va 0x40000000 pages 0x2000 attr 0x8
type 0x7 pa 0x42000000 va 0x42000000 pages 0x5ef7 attr 0x8
type 0x4 pa 0x47ef7000 va 0x47ef7000 pages 0x12 attr 0x8
type 0x7 pa 0x47f09000 va 0x47f09000 pages 0x30403 attr 0x8
type 0x2 pa 0x7830c000 va 0x7830c000 pages 0xb2c attr 0x8
type 0x4 pa 0x78e38000 va 0x78e38000 pages 0x1 attr 0x8
type 0x7 pa 0x78e39000 va 0x78e39000 pages 0x1 attr 0x8
type 0x2 pa 0x78e3a000 va 0x78e3a000 pages 0x100 attr 0x8
type 0x1 pa 0x78f3a000 va 0x78f3a000 pages 0x16 attr 0x8
type 0x0 pa 0x78f50000 va 0x78f50000 pages 0x5 attr 0x8
type 0x4 pa 0x78f55000 va 0x78f55000 pages 0x1 attr 0x8
type 0x6 pa 0x78f56000 va 0x78f56000 pages 0x1 attr 0x8000000000000008
type 0x4 pa 0x78f57000 va 0x78f57000 pages 0x2 attr 0x8
type 0x0 pa 0x78f59000 va 0x78f59000 pages 0x4 attr 0x8
type 0x4 pa 0x78f5d000 va 0x78f5d000 pages 0x2 attr 0x8
type 0x0 pa 0x78f5f000 va 0x78f5f000 pages 0x2 attr 0x8
type 0x6 pa 0x78f61000 va 0x78f61000 pages 0x1 attr 0x8000000000000008
type 0x0 pa 0x78f62000 va 0x78f62000 pages 0x1 attr 0x8
type 0x2 pa 0x78f63000 va 0x78f63000 pages 0x5027 attr 0x8
type 0x5 pa 0x7df8a000 va 0x7df8a000 pages 0x1 attr 0x8000000000000008
type 0x2 pa 0x7df8b000 va 0x7df8b000 pages 0x2075 attr 0x8
pmap board type: 0
Copyright (c) 1982, 1986, 1989, 1991, 1993
        The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2019 OpenBSD. All rights reserved.  https://www.OpenBSD.org

OpenBSD 6.6 (RAMDISK) #203: Sat Oct 12 09:26:27 MDT 2019
    [hidden email]:/usr/src/sys/arch/armv7/compile/RAMDISK
real mem  = 942645248 (898MB)
avail mem = 909217792 (867MB)
mainbus0 at root: Xunlong Orange Pi PC
cpu0 at mainbus0 mpidr 0: ARM Cortex-A7 r0p5
cpu0: 32KB 32b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 512KB 64b/line 8-way L2 cache
cortex0 at mainbus0
psci0 at mainbus0: PSCI 0.0
sxiccmu0 at mainbus0
simplebus0 at mainbus0: "soc"
sxiccmu1 at simplebus0
sxipio0 at simplebus0: 94 pins
ampintc0 at simplebus0 nirq 160, ncpu 4: "interrupt-controller"
sxirtc0 at simplebus0
sxiccmu2 at simplebus0
sxipio1 at simplebus0: 12 pins
sxisyscon0 at simplebus0
"clock" at simplebus0 not configured
"mixer" at simplebus0 not configured
"dma-controller" at simplebus0 not configured
"lcd-controller" at simplebus0 not configured
sximmc0 at simplebus0
sdmmc0 at sximmc0: 4-bit, sd high-speed, mmc high-speed, dma
"eeprom" at simplebus0 not configured
"usb" at simplebus0 not configured
"phy" at simplebus0 not configured
ehci0 at simplebus0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci0 at simplebus0: version 1.0
ehci1 at simplebus0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci1 at simplebus0: version 1.0
ehci2 at simplebus0
usb2 at ehci2: USB revision 2.0
uhub2 at usb2 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci2 at simplebus0: version 1.0
ehci3 at simplebus0
usb3 at ehci3: USB revision 2.0
uhub3 at usb3 configuration 1 interface 0 "Generic EHCI root hub" rev 2.00/1.00 addr 1
ohci3 at simplebus0: version 1.0
"timer" at simplebus0 not configured
dwxe0 at simplebus0: address 02:81:95:2b:4e:9e
ukphy0 at dwxe0 phy 1: Generic IEEE 802.3u media interface, rev. 0: OUI 0x001105, model 0x0000
"dram-controller" at simplebus0 not configured
sxidog0 at simplebus0
"codec" at simplebus0 not configured
com0 at simplebus0: ns16550, no working fifo
com0: console
"hdmi" at simplebus0 not configured
"hdmi-phy" at simplebus0 not configured
"codec-analog" at simplebus0 not configured
"ir" at simplebus0 not configured
sxitwi0 at simplebus0
iic0 at sxitwi0
"silergy,sy8106a" at iic0 addr 0x65 not configured
"deinterlace" at simplebus0 not configured
"video-codec" at simplebus0 not configured
"crypto" at simplebus0 not configured
"gpu" at simplebus0 not configured
"thermal-sensor" at simplebus0 not configured
gpio0 at sxipio0: 32 pins
gpio1 at sxipio0: 32 pins
gpio2 at sxipio0: 32 pins
gpio3 at sxipio0: 32 pins
gpio4 at sxipio0: 32 pins
gpio5 at sxipio0: 32 pins
gpio6 at sxipio0: 32 pins
gpio7 at sxipio1: 32 pins
usb4 at ohci0: USB revision 1.0
uhub4 at usb4 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
usb5 at ohci1: USB revision 1.0
uhub5 at usb5 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
usb6 at ohci2: USB revision 1.0
uhub6 at usb6 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
usb7 at ohci3: USB revision 1.0
uhub7 at usb7 configuration 1 interface 0 "Generic OHCI root hub" rev 1.00/1.00 addr 1
agtimer0 at mainbus0: tick rate 24000 KHz
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, SD16G, 0030> removable
sd0: 14784MB, 512 bytes/sector, 30277632 sectors
softraid0 at root
scsibus1 at softraid0: 256 targets
bootfile: sd0a:/bsd
boot device: sd0
root on rd0a swap on rd0b dump on rd0b
WARNING: preposterous clock chip time
WARNING: CHECK AND RESET THE DATE!
(hang up here)
----

There is no problem with Banana Pi BPI-M1 (Allwinner A20, Cortex-A7 r0p4).

I think the difference between r0p4 and r0p5 makes something worse,
but I found no evidence yet.

I want to help to solve this problem, what should I do next?
--
SASANO Takayoshi (JG1UAA) <[hidden email]>

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Allwinner H3/H5: PLL1 (CPU_PLL) setting

SASANO Takayoshi
Hi,

Previously I found OpenBSD-6.6, 6.7 and -current did not work on
my Orange Pi PC (Allwinner H3).

For these days I was looking for what caused this problem, and
finally I found the M field of H3_PLL_CPUX_CTRL_REG (@0x01c20000)
made thing worse.

This, M value should be 2. If this is 1, system will be hang.
Here is easy test method that writing value 0x90001431 (default)
and 0x90001410, they produce same clock frequency 1008MHz.

But there is a mystery why OpenBSD-6.5 worked on Orange Pi PC.
CPU Clock setting code was introduced at 6.4 so there was a time
that code made no problem.

Anyway there is a diff to work Orange Pi PC again.
(over 1536MHz setting is not tested, maybe CPU will be overclocked.)

Index: sxiccmu.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/sxiccmu.c,v
retrieving revision 1.27
diff -u -p -r1.27 sxiccmu.c
--- sxiccmu.c 28 Mar 2020 12:32:53 -0000 1.27
+++ sxiccmu.c 28 Jun 2020 05:58:15 -0000
@@ -1633,16 +1633,22 @@ sxiccmu_h3_set_frequency(struct sxiccmu_
  struct sxiccmu_clock clock;
  uint32_t parent, parent_freq;
  uint32_t reg;
- int k, n;
+ int k, m, n;
  int error;
 
  switch (idx) {
  case H3_CLK_PLL_CPUX:
- k = 1; n = 32;
- while (k <= 4 && (24000000 * n * k) < freq)
- k++;
- while (n >= 1 && (24000000 * n * k) > freq)
- n--;
+ if (freq >= 1584000000) { /* (n = 33) * 24MHz * 2 */
+ m = 1;
+ k = 4;
+ } else if (freq >= 792000000) { /* (n = 33) * 24MHz */
+ m = 2;
+ k = 4;
+ } else {
+ m = 2;
+ k = 2;
+ }
+ n = (freq / 24000000) * m / k; /* n should be 1 to 32 */
 
  reg = SXIREAD4(sc, H3_PLL_CPUX_CTRL_REG);
  reg &= ~H3_PLL_CPUX_OUT_EXT_DIVP_MASK;
@@ -1651,6 +1657,7 @@ sxiccmu_h3_set_frequency(struct sxiccmu_
  reg &= ~H3_PLL_CPUX_FACTOR_M_MASK;
  reg |= ((n - 1) << H3_PLL_CPUX_FACTOR_N_SHIFT);
  reg |= ((k - 1) << H3_PLL_CPUX_FACTOR_K_SHIFT);
+ reg |= ((m - 1) << H3_PLL_CPUX_FACTOR_M_SHIFT);
  SXIWRITE4(sc, H3_PLL_CPUX_CTRL_REG, reg);
 
  /* Wait for PLL to lock. */

--
SASANO Takayoshi (JG1UAA) <[hidden email]>