Intel Atom E600 watchdog(4) support

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Intel Atom E600 watchdog(4) support

Matt Dainty
Attached are some patches that add support for the watchdog device on
boards based on the Intel Atom E600 series such as the Soekris net6501.

Based on existing drivers such as amdpcib(4), ichpcib(4) and ichwdt(4)
I've created an e600pcib(4) to override the standard pcib(4) which can
then access the watchdog device.

Here's the original dmesg:

---8<---
pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00
isa0 at pcib0
---8<---

Here's with my changes:

---8<---
e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog
isa0 at e600pcib0
---8<---

I tested the watchdog by setting kern.watchdog.period to 60 and then
breaking into ddb and starting a stopwatch and timing until my net6501
resets, it take near enough to 60 seconds that I'm happy it's working.

On a watchdog-triggered reboot, I've done similar to ichwdt(4):

---8<---
e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog, reboot on timeout
isa0 at e600pcib0
---8<---

I've included the driver itself, man pages, changes to GENERIC and the
various infrastructure files.

I'm using it with GENERIC.MP on amd64 and I compile tested it on i386.

Any comments?

Matt

--- /dev/null Wed May 23 21:01:50 2012
+++ sys/dev/pci/e600pcib.c Wed May 23 21:00:44 2012
@@ -0,0 +1,220 @@
+/* $OpenBSD$ */
+
+/*
+ * Copyright (c) 2012 Matt Dainty <[hidden email]>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Intel Atom E600 series LPC bridge also containing watchdog
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#define E600_LPC_SMBA 0x40 /* SMBus Base Address */
+#define E600_LPC_GBA 0x44 /* GPIO Base Address */
+#define E600_LPC_WDTBA 0x84 /* WDT Base Address */
+
+#define E600_WDT_SIZE 64 /* I/O region size */
+#define E600_WDT_PV1 0x00 /* Preload Value 1 Register */
+#define E600_WDT_PV2 0x04 /* Preload Value 2 Register */
+#define E600_WDT_RR0 0x0c /* Reload Register 0 */
+#define E600_WDT_RR1 0x0d /* Reload Register 1 */
+#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag */
+#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag */
+#define E600_WDT_WDTCR 0x10 /* WDT Configuration Register */
+#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout Output Enable */
+#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable */
+#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select */
+#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar Select */
+#define E600_WDT_DCR 0x14 /* Down Counter Register */
+#define E600_WDT_WDTLR 0x18 /* WDT Lock Register */
+#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer Lock */
+#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer Enable */
+#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout Configuration */
+
+struct e600pcib_softc {
+ struct device sc_dev;
+
+ /* Watchdog interface */
+ bus_space_tag_t sc_wdt_iot;
+ bus_space_handle_t sc_wdt_ioh;
+
+ int sc_wdt_period;
+};
+
+struct cfdriver e600pcib_cd = {
+ NULL, "e600pcib", DV_DULL
+};
+
+int e600pcib_match(struct device *, void *, void *);
+void e600pcib_attach(struct device *, struct device *, void *);
+
+int e600pcib_wdt_cb(void *, int);
+
+struct cfattach e600pcib_ca = {
+ sizeof(struct e600pcib_softc), e600pcib_match, e600pcib_attach
+};
+
+/* from arch/<*>/pci/pcib.c */
+void pcibattach(struct device *parent, struct device *self, void *aux);
+
+const struct pci_matchid e600pcib_devices[] = {
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC }
+};
+
+#ifndef SMALL_KERNEL
+static __inline void
+e600pcib_wdt_unlock(struct e600pcib_softc *sc)
+{
+ /* Register unlocking sequence */
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x80);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x86);
+}
+#endif /* !SMALL_KERNEL */
+
+int
+e600pcib_match(struct device *parent, void *match, void *aux)
+{
+ if (pci_matchbyid((struct pci_attach_args *)aux, e600pcib_devices,
+    sizeof(e600pcib_devices) / sizeof(e600pcib_devices[0])))
+ return (2);
+
+ return (0);
+}
+
+void
+e600pcib_attach(struct device *parent, struct device *self, void *aux)
+{
+#ifndef SMALL_KERNEL
+ struct e600pcib_softc *sc = (struct e600pcib_softc *)self;
+ struct pci_attach_args *pa = aux;
+ u_int32_t reg, wdtbase;
+
+ /* Map Watchdog I/O space */
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA);
+ wdtbase = reg & 0xffff;
+ sc->sc_wdt_iot = pa->pa_iot;
+ if (reg & (1 << 31) && wdtbase) {
+ if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 ||
+    bus_space_map(sc->sc_wdt_iot, PCI_MAPREG_IO_ADDR(wdtbase),
+    E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) {
+ printf(": can't map watchdog I/O space");
+ goto corepcib;
+ }
+ printf(": watchdog", wdtbase);
+
+ /* Check for reboot on timeout */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1);
+ if (reg & E600_WDT_RR1_TIMEOUT) {
+ printf(", reboot on timeout");
+
+ /* Clear timeout bit */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_TIMEOUT);
+ }
+
+ /* Check it's not locked already */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR);
+ if (reg & E600_WDT_WDTLR_LOCK) {
+ printf(", locked");
+ goto corepcib;
+ }
+
+ /* Disable watchdog */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, 0);
+ sc->sc_wdt_period = 0;
+
+ /* Register new watchdog */
+ wdog_register(sc, e600pcib_wdt_cb);
+ }
+
+corepcib:
+#endif /* !SMALL_KERNEL */
+ /* Provide core pcib(4) functionality */
+ pcibattach(parent, self, aux);
+}
+
+#ifndef SMALL_KERNEL
+int
+e600pcib_wdt_cb(void *arg, int period)
+{
+ struct e600pcib_softc *sc = arg;
+ u_int32_t preload;
+
+ if (period == 0) {
+ if (sc->sc_wdt_period != 0) {
+ /* Disable watchdog, with a reload before for safety */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, 0);
+ }
+ } else {
+ /* 600 seconds is the maximum supported timeout value */
+ if (period > 600)
+ period = 600;
+ if (sc->sc_wdt_period != period) {
+ /* Set new timeout */
+ preload = (period * 33000000) >> 15;
+ preload--;
+
+ /* Set watchdog to perform a cold reset toggling the
+ * GPIO pin and the timer set to 1ms-10m resolution
+ */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTCR, E600_WDT_WDTCR_ENABLE);
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_PV1, 0);
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_PV2, preload);
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ }
+ if (sc->sc_wdt_period == 0) {
+ /* Enable watchdog */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, E600_WDT_WDTLR_ENABLE);
+ } else {
+ /* Reset timer */
+ e600pcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ }
+ }
+ sc->sc_wdt_period = period;
+
+ return (period);
+}
+#endif /* !SMALL_KERNEL */
--- /dev/null Wed May 23 21:02:08 2012
+++ share/man/man4/man4.i386/e600pcib.4 Wed May 23 20:37:44 2012
@@ -0,0 +1,55 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt E600PCIB 4 i386
+.Os
+.Sh NAME
+.Nm e600pcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "e600pcib* at pci?"
+.Cd "isa* at e600pcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
--- /dev/null Wed May 23 21:02:17 2012
+++ share/man/man4/man4.amd64/e600pcib.4 Wed May 23 20:53:39 2012
@@ -0,0 +1,55 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt E600PCIB 4 amd64
+.Os
+.Sh NAME
+.Nm e600pcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "e600pcib* at pci?"
+.Cd "isa* at e600pcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
--- share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012
+++ share/man/man4/man4.i386/Makefile Wed May 23 21:04:33 2012
@@ -2,9 +2,9 @@
 # from: @(#)Makefile 5.1 (Berkeley) 2/12/91
 # Id: Makefile,v 1.4 1995/12/14 05:41:38 deraadt Exp $
 
-MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 elansc.4 \
- esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
- ichpcib.4 intro.4 ioapic.4 \
+MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 \
+ elansc.4 esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 \
+ gus.4 ie.4 ichpcib.4 intro.4 ioapic.4 \
  joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
  pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
  sea.4 uha.4 wds.4 wdt.4 wss.4
--- share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012
+++ share/man/man4/man4.amd64/Makefile Wed May 23 21:05:12 2012
@@ -1,7 +1,7 @@
 # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $
 
-MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \
- mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
+MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 intro.4 \
+ ioapic.4 mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
 
 MLINKS+= mem.4 kmem.4
 MANSUBDIR=amd64
--- sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012
+++ sys/arch/i386/conf/files.i386 Wed May 23 18:20:09 2012
@@ -147,7 +147,7 @@
 # PCI-ISA bridge chipsets
 device pcib: isabus
 attach pcib at pci
-file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib
+file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib | e600pcib
 
 # Intel ICHx/ICHx-M LPC bridges
 device ichpcib: isabus
@@ -168,6 +168,11 @@
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device e600pcib: isabus
+attach e600pcib at pci
+file dev/pci/e600pcib.c e600pcib
 
 device hme: ether, ifnet, mii, ifmedia
 file dev/ic/hme.c hme
--- sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012
+++ sys/arch/i386/conf/GENERIC Wed May 23 18:19:26 2012
@@ -72,6 +72,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at e600pcib?
 isa0 at ichpcib?
 isa0 at piixpcib?
 isa0 at gscpcib?
@@ -85,6 +86,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+e600pcib* at pci? # Intel Atom E600 LPC bridge
 ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges
 piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge
 gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge
--- sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012
+++ sys/arch/amd64/conf/files.amd64 Wed May 23 14:17:00 2012
@@ -147,12 +147,17 @@
 # PCI-ISA bridges
 device pcib: isabus
 attach pcib at pci
-file arch/amd64/pci/pcib.c pcib | amdpcib
+file arch/amd64/pci/pcib.c pcib | amdpcib | e600pcib
 
 # AMD 8111 LPC bridge
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device e600pcib: isabus
+attach e600pcib at pci
+file dev/pci/e600pcib.c e600pcib
 
 device aapic
 attach aapic at pci
--- sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012
+++ sys/arch/amd64/conf/GENERIC Wed May 23 14:17:18 2012
@@ -34,6 +34,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at e600pcib?
 pci* at mainbus0
 
 acpi0 at bios0
@@ -73,6 +74,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+e600pcib* at pci? # Intel Atom E600 LPC bridge
 kate* at pci? # AMD K8 temperature sensor
 km* at pci? # AMD K10 temperature sensor
 amas* at pci? disable # AMD memory configuration

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Re: Intel Atom E600 watchdog(4) support

Jonathan Gray-11
As a general policy drivers do not have numbers in their name,
so it will have to be renamed.

I'll have a look into trying it on a net6501 I have here with i386.

On Wed, May 23, 2012 at 04:52:03PM -0400, Matt Dainty wrote:

> Attached are some patches that add support for the watchdog device on
> boards based on the Intel Atom E600 series such as the Soekris net6501.
>
> Based on existing drivers such as amdpcib(4), ichpcib(4) and ichwdt(4)
> I've created an e600pcib(4) to override the standard pcib(4) which can
> then access the watchdog device.
>
> Here's the original dmesg:
>
> ---8<---
> pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00
> isa0 at pcib0
> ---8<---
>
> Here's with my changes:
>
> ---8<---
> e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog
> isa0 at e600pcib0
> ---8<---
>
> I tested the watchdog by setting kern.watchdog.period to 60 and then
> breaking into ddb and starting a stopwatch and timing until my net6501
> resets, it take near enough to 60 seconds that I'm happy it's working.
>
> On a watchdog-triggered reboot, I've done similar to ichwdt(4):
>
> ---8<---
> e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog, reboot on timeout
> isa0 at e600pcib0
> ---8<---
>
> I've included the driver itself, man pages, changes to GENERIC and the
> various infrastructure files.
>
> I'm using it with GENERIC.MP on amd64 and I compile tested it on i386.
>
> Any comments?
>
> Matt
>
> --- /dev/null Wed May 23 21:01:50 2012
> +++ sys/dev/pci/e600pcib.c Wed May 23 21:00:44 2012
> @@ -0,0 +1,220 @@
> +/* $OpenBSD$ */
> +
> +/*
> + * Copyright (c) 2012 Matt Dainty <[hidden email]>
> + *
> + * Permission to use, copy, modify, and distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
> + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
> + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +/*
> + * Intel Atom E600 series LPC bridge also containing watchdog
> + */
> +
> +#include <sys/param.h>
> +#include <sys/systm.h>
> +#include <sys/device.h>
> +
> +#include <machine/bus.h>
> +
> +#include <dev/pci/pcireg.h>
> +#include <dev/pci/pcivar.h>
> +#include <dev/pci/pcidevs.h>
> +
> +#define E600_LPC_SMBA 0x40 /* SMBus Base Address */
> +#define E600_LPC_GBA 0x44 /* GPIO Base Address */
> +#define E600_LPC_WDTBA 0x84 /* WDT Base Address */
> +
> +#define E600_WDT_SIZE 64 /* I/O region size */
> +#define E600_WDT_PV1 0x00 /* Preload Value 1 Register */
> +#define E600_WDT_PV2 0x04 /* Preload Value 2 Register */
> +#define E600_WDT_RR0 0x0c /* Reload Register 0 */
> +#define E600_WDT_RR1 0x0d /* Reload Register 1 */
> +#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag */
> +#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag */
> +#define E600_WDT_WDTCR 0x10 /* WDT Configuration Register */
> +#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout Output Enable */
> +#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable */
> +#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select */
> +#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar Select */
> +#define E600_WDT_DCR 0x14 /* Down Counter Register */
> +#define E600_WDT_WDTLR 0x18 /* WDT Lock Register */
> +#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer Lock */
> +#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer Enable */
> +#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout Configuration */
> +
> +struct e600pcib_softc {
> + struct device sc_dev;
> +
> + /* Watchdog interface */
> + bus_space_tag_t sc_wdt_iot;
> + bus_space_handle_t sc_wdt_ioh;
> +
> + int sc_wdt_period;
> +};
> +
> +struct cfdriver e600pcib_cd = {
> + NULL, "e600pcib", DV_DULL
> +};
> +
> +int e600pcib_match(struct device *, void *, void *);
> +void e600pcib_attach(struct device *, struct device *, void *);
> +
> +int e600pcib_wdt_cb(void *, int);
> +
> +struct cfattach e600pcib_ca = {
> + sizeof(struct e600pcib_softc), e600pcib_match, e600pcib_attach
> +};
> +
> +/* from arch/<*>/pci/pcib.c */
> +void pcibattach(struct device *parent, struct device *self, void *aux);
> +
> +const struct pci_matchid e600pcib_devices[] = {
> + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC }
> +};
> +
> +#ifndef SMALL_KERNEL
> +static __inline void
> +e600pcib_wdt_unlock(struct e600pcib_softc *sc)
> +{
> + /* Register unlocking sequence */
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x80);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x86);
> +}
> +#endif /* !SMALL_KERNEL */
> +
> +int
> +e600pcib_match(struct device *parent, void *match, void *aux)
> +{
> + if (pci_matchbyid((struct pci_attach_args *)aux, e600pcib_devices,
> +    sizeof(e600pcib_devices) / sizeof(e600pcib_devices[0])))
> + return (2);
> +
> + return (0);
> +}
> +
> +void
> +e600pcib_attach(struct device *parent, struct device *self, void *aux)
> +{
> +#ifndef SMALL_KERNEL
> + struct e600pcib_softc *sc = (struct e600pcib_softc *)self;
> + struct pci_attach_args *pa = aux;
> + u_int32_t reg, wdtbase;
> +
> + /* Map Watchdog I/O space */
> + reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA);
> + wdtbase = reg & 0xffff;
> + sc->sc_wdt_iot = pa->pa_iot;
> + if (reg & (1 << 31) && wdtbase) {
> + if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 ||
> +    bus_space_map(sc->sc_wdt_iot, PCI_MAPREG_IO_ADDR(wdtbase),
> +    E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) {
> + printf(": can't map watchdog I/O space");
> + goto corepcib;
> + }
> + printf(": watchdog", wdtbase);
> +
> + /* Check for reboot on timeout */
> + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_RR1);
> + if (reg & E600_WDT_RR1_TIMEOUT) {
> + printf(", reboot on timeout");
> +
> + /* Clear timeout bit */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_RR1, E600_WDT_RR1_TIMEOUT);
> + }
> +
> + /* Check it's not locked already */
> + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_WDTLR);
> + if (reg & E600_WDT_WDTLR_LOCK) {
> + printf(", locked");
> + goto corepcib;
> + }
> +
> + /* Disable watchdog */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_WDTLR, 0);
> + sc->sc_wdt_period = 0;
> +
> + /* Register new watchdog */
> + wdog_register(sc, e600pcib_wdt_cb);
> + }
> +
> +corepcib:
> +#endif /* !SMALL_KERNEL */
> + /* Provide core pcib(4) functionality */
> + pcibattach(parent, self, aux);
> +}
> +
> +#ifndef SMALL_KERNEL
> +int
> +e600pcib_wdt_cb(void *arg, int period)
> +{
> + struct e600pcib_softc *sc = arg;
> + u_int32_t preload;
> +
> + if (period == 0) {
> + if (sc->sc_wdt_period != 0) {
> + /* Disable watchdog, with a reload before for safety */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_WDTLR, 0);
> + }
> + } else {
> + /* 600 seconds is the maximum supported timeout value */
> + if (period > 600)
> + period = 600;
> + if (sc->sc_wdt_period != period) {
> + /* Set new timeout */
> + preload = (period * 33000000) >> 15;
> + preload--;
> +
> + /* Set watchdog to perform a cold reset toggling the
> + * GPIO pin and the timer set to 1ms-10m resolution
> + */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_WDTCR, E600_WDT_WDTCR_ENABLE);
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_PV1, 0);
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_PV2, preload);
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> + }
> + if (sc->sc_wdt_period == 0) {
> + /* Enable watchdog */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_WDTLR, E600_WDT_WDTLR_ENABLE);
> + } else {
> + /* Reset timer */
> + e600pcib_wdt_unlock(sc);
> + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> + }
> + }
> + sc->sc_wdt_period = period;
> +
> + return (period);
> +}
> +#endif /* !SMALL_KERNEL */
> --- /dev/null Wed May 23 21:02:08 2012
> +++ share/man/man4/man4.i386/e600pcib.4 Wed May 23 20:37:44 2012
> @@ -0,0 +1,55 @@
> +.\"     $OpenBSD$
> +.\"
> +.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
> +.\"
> +.\" Permission to use, copy, modify, and distribute this software for any
> +.\" purpose with or without fee is hereby granted, provided that the above
> +.\" copyright notice and this permission notice appear in all copies.
> +.\"
> +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +.\"
> +.Dd $Mdocdate$
> +.Dt E600PCIB 4 i386
> +.Os
> +.Sh NAME
> +.Nm e600pcib
> +.Nd Intel Atom E600 series LPC bridge and watchdog
> +.Sh SYNOPSIS
> +.Cd "e600pcib* at pci?"
> +.Cd "isa* at e600pcib?"
> +.Sh DESCRIPTION
> +The
> +.Nm
> +driver provides support for the Intel Atom E600 series LPC bridge and
> +provides the standard
> +.Xr watchdog 4
> +interface to the watchdog timer and may be used with
> +.Xr watchdogd 8 .
> +The watchdog timer can be configured via
> +.Xr sysctl 8 .
> +.Pp
> +Once the watchdog timer resets the CPU, the driver reports it on the
> +next boot displaying the ``reboot on timeout'' message in the dmesg.
> +.Sh SEE ALSO
> +.Xr intro 4 ,
> +.Xr isa 4 ,
> +.Xr pci 4 ,
> +.Xr watchdog 4
> +.Xr sysctl 8
> +.Xr watchdogd 8
> +.Sh HISTORY
> +The
> +.Nm
> +driver first appeared in
> +.Ox 5.2 .
> +.Sh AUTHORS
> +The
> +.Nm
> +driver was written by
> +.An Matt Dainty Aq [hidden email] .
> --- /dev/null Wed May 23 21:02:17 2012
> +++ share/man/man4/man4.amd64/e600pcib.4 Wed May 23 20:53:39 2012
> @@ -0,0 +1,55 @@
> +.\"     $OpenBSD$
> +.\"
> +.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
> +.\"
> +.\" Permission to use, copy, modify, and distribute this software for any
> +.\" purpose with or without fee is hereby granted, provided that the above
> +.\" copyright notice and this permission notice appear in all copies.
> +.\"
> +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +.\"
> +.Dd $Mdocdate$
> +.Dt E600PCIB 4 amd64
> +.Os
> +.Sh NAME
> +.Nm e600pcib
> +.Nd Intel Atom E600 series LPC bridge and watchdog
> +.Sh SYNOPSIS
> +.Cd "e600pcib* at pci?"
> +.Cd "isa* at e600pcib?"
> +.Sh DESCRIPTION
> +The
> +.Nm
> +driver provides support for the Intel Atom E600 series LPC bridge and
> +provides the standard
> +.Xr watchdog 4
> +interface to the watchdog timer and may be used with
> +.Xr watchdogd 8 .
> +The watchdog timer can be configured via
> +.Xr sysctl 8 .
> +.Pp
> +Once the watchdog timer resets the CPU, the driver reports it on the
> +next boot displaying the ``reboot on timeout'' message in the dmesg.
> +.Sh SEE ALSO
> +.Xr intro 4 ,
> +.Xr isa 4 ,
> +.Xr pci 4 ,
> +.Xr watchdog 4
> +.Xr sysctl 8
> +.Xr watchdogd 8
> +.Sh HISTORY
> +The
> +.Nm
> +driver first appeared in
> +.Ox 5.2 .
> +.Sh AUTHORS
> +The
> +.Nm
> +driver was written by
> +.An Matt Dainty Aq [hidden email] .
> --- share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012
> +++ share/man/man4/man4.i386/Makefile Wed May 23 21:04:33 2012
> @@ -2,9 +2,9 @@
>  # from: @(#)Makefile 5.1 (Berkeley) 2/12/91
>  # Id: Makefile,v 1.4 1995/12/14 05:41:38 deraadt Exp $
>  
> -MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 elansc.4 \
> - esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
> - ichpcib.4 intro.4 ioapic.4 \
> +MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 \
> + elansc.4 esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 \
> + gus.4 ie.4 ichpcib.4 intro.4 ioapic.4 \
>   joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
>   pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
>   sea.4 uha.4 wds.4 wdt.4 wss.4
> --- share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012
> +++ share/man/man4/man4.amd64/Makefile Wed May 23 21:05:12 2012
> @@ -1,7 +1,7 @@
>  # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $
>  
> -MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \
> - mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
> +MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 intro.4 \
> + ioapic.4 mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
>  
>  MLINKS+= mem.4 kmem.4
>  MANSUBDIR=amd64
> --- sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012
> +++ sys/arch/i386/conf/files.i386 Wed May 23 18:20:09 2012
> @@ -147,7 +147,7 @@
>  # PCI-ISA bridge chipsets
>  device pcib: isabus
>  attach pcib at pci
> -file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib
> +file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib | e600pcib
>  
>  # Intel ICHx/ICHx-M LPC bridges
>  device ichpcib: isabus
> @@ -168,6 +168,11 @@
>  device amdpcib: isabus
>  attach amdpcib at pci
>  file dev/pci/amdpcib.c amdpcib
> +
> +# Intel Atom E600 LPC bridge
> +device e600pcib: isabus
> +attach e600pcib at pci
> +file dev/pci/e600pcib.c e600pcib
>  
>  device hme: ether, ifnet, mii, ifmedia
>  file dev/ic/hme.c hme
> --- sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012
> +++ sys/arch/i386/conf/GENERIC Wed May 23 18:19:26 2012
> @@ -72,6 +72,7 @@
>  isa0 at mainbus0
>  isa0 at pcib?
>  isa0 at amdpcib?
> +isa0 at e600pcib?
>  isa0 at ichpcib?
>  isa0 at piixpcib?
>  isa0 at gscpcib?
> @@ -85,6 +86,7 @@
>  pci* at pchb?
>  pcib* at pci? # PCI-ISA bridge
>  amdpcib* at pci? # AMD 8111 LPC bridge
> +e600pcib* at pci? # Intel Atom E600 LPC bridge
>  ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges
>  piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge
>  gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge
> --- sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012
> +++ sys/arch/amd64/conf/files.amd64 Wed May 23 14:17:00 2012
> @@ -147,12 +147,17 @@
>  # PCI-ISA bridges
>  device pcib: isabus
>  attach pcib at pci
> -file arch/amd64/pci/pcib.c pcib | amdpcib
> +file arch/amd64/pci/pcib.c pcib | amdpcib | e600pcib
>  
>  # AMD 8111 LPC bridge
>  device amdpcib: isabus
>  attach amdpcib at pci
>  file dev/pci/amdpcib.c amdpcib
> +
> +# Intel Atom E600 LPC bridge
> +device e600pcib: isabus
> +attach e600pcib at pci
> +file dev/pci/e600pcib.c e600pcib
>  
>  device aapic
>  attach aapic at pci
> --- sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012
> +++ sys/arch/amd64/conf/GENERIC Wed May 23 14:17:18 2012
> @@ -34,6 +34,7 @@
>  isa0 at mainbus0
>  isa0 at pcib?
>  isa0 at amdpcib?
> +isa0 at e600pcib?
>  pci* at mainbus0
>  
>  acpi0 at bios0
> @@ -73,6 +74,7 @@
>  pci* at pchb?
>  pcib* at pci? # PCI-ISA bridge
>  amdpcib* at pci? # AMD 8111 LPC bridge
> +e600pcib* at pci? # Intel Atom E600 LPC bridge
>  kate* at pci? # AMD K8 temperature sensor
>  km* at pci? # AMD K10 temperature sensor
>  amas* at pci? disable # AMD memory configuration

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Re: Intel Atom E600 watchdog(4) support

Matt Dainty
* Jonathan Gray <[hidden email]> [2012-05-24 01:23:28]:
> As a general policy drivers do not have numbers in their name,
> so it will have to be renamed.

Yes, I got a couple of private mails stating the same, which explains
why I hadn't seen any others. Anyway, Mike Belopuhov suggested pchpcib
as an alternative name so I've renamed the driver to that along with
the man pages, etc.

Here's the dmesg now:

---8<---
pchpcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog
isa0 at pchpcib0
---8<---

Looks much better to me too.

> I'll have a look into trying it on a net6501 I have here with i386.

Thanks, much appreciated.

Updated patch below.

Matt

--- /dev/null Thu May 24 00:43:16 2012
+++ sys/dev/pci/pchpcib.c Thu May 24 00:34:28 2012
@@ -0,0 +1,220 @@
+/* $OpenBSD$ */
+
+/*
+ * Copyright (c) 2012 Matt Dainty <[hidden email]>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Intel Atom E600 series LPC bridge also containing watchdog
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#define E600_LPC_SMBA 0x40 /* SMBus Base Address */
+#define E600_LPC_GBA 0x44 /* GPIO Base Address */
+#define E600_LPC_WDTBA 0x84 /* WDT Base Address */
+
+#define E600_WDT_SIZE 64 /* I/O region size */
+#define E600_WDT_PV1 0x00 /* Preload Value 1 Register */
+#define E600_WDT_PV2 0x04 /* Preload Value 2 Register */
+#define E600_WDT_RR0 0x0c /* Reload Register 0 */
+#define E600_WDT_RR1 0x0d /* Reload Register 1 */
+#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag */
+#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag */
+#define E600_WDT_WDTCR 0x10 /* WDT Configuration Register */
+#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout Output Enable */
+#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable */
+#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select */
+#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar Select */
+#define E600_WDT_DCR 0x14 /* Down Counter Register */
+#define E600_WDT_WDTLR 0x18 /* WDT Lock Register */
+#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer Lock */
+#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer Enable */
+#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout Configuration */
+
+struct pchpcib_softc {
+ struct device sc_dev;
+
+ /* Watchdog interface */
+ bus_space_tag_t sc_wdt_iot;
+ bus_space_handle_t sc_wdt_ioh;
+
+ int sc_wdt_period;
+};
+
+struct cfdriver pchpcib_cd = {
+ NULL, "pchpcib", DV_DULL
+};
+
+int pchpcib_match(struct device *, void *, void *);
+void pchpcib_attach(struct device *, struct device *, void *);
+
+int pchpcib_wdt_cb(void *, int);
+
+struct cfattach pchpcib_ca = {
+ sizeof(struct pchpcib_softc), pchpcib_match, pchpcib_attach
+};
+
+/* from arch/<*>/pci/pcib.c */
+void pcibattach(struct device *parent, struct device *self, void *aux);
+
+const struct pci_matchid pchpcib_devices[] = {
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC }
+};
+
+#ifndef SMALL_KERNEL
+static __inline void
+pchpcib_wdt_unlock(struct pchpcib_softc *sc)
+{
+ /* Register unlocking sequence */
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x80);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x86);
+}
+#endif /* !SMALL_KERNEL */
+
+int
+pchpcib_match(struct device *parent, void *match, void *aux)
+{
+ if (pci_matchbyid((struct pci_attach_args *)aux, pchpcib_devices,
+    sizeof(pchpcib_devices) / sizeof(pchpcib_devices[0])))
+ return (2);
+
+ return (0);
+}
+
+void
+pchpcib_attach(struct device *parent, struct device *self, void *aux)
+{
+#ifndef SMALL_KERNEL
+ struct pchpcib_softc *sc = (struct pchpcib_softc *)self;
+ struct pci_attach_args *pa = aux;
+ u_int32_t reg, wdtbase;
+
+ /* Map Watchdog I/O space */
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA);
+ wdtbase = reg & 0xffff;
+ sc->sc_wdt_iot = pa->pa_iot;
+ if (reg & (1 << 31) && wdtbase) {
+ if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 ||
+    bus_space_map(sc->sc_wdt_iot, PCI_MAPREG_IO_ADDR(wdtbase),
+    E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) {
+ printf(": can't map watchdog I/O space");
+ goto corepcib;
+ }
+ printf(": watchdog");
+
+ /* Check for reboot on timeout */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1);
+ if (reg & E600_WDT_RR1_TIMEOUT) {
+ printf(", reboot on timeout");
+
+ /* Clear timeout bit */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_TIMEOUT);
+ }
+
+ /* Check it's not locked already */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR);
+ if (reg & E600_WDT_WDTLR_LOCK) {
+ printf(", locked");
+ goto corepcib;
+ }
+
+ /* Disable watchdog */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, 0);
+ sc->sc_wdt_period = 0;
+
+ /* Register new watchdog */
+ wdog_register(sc, pchpcib_wdt_cb);
+ }
+
+corepcib:
+#endif /* !SMALL_KERNEL */
+ /* Provide core pcib(4) functionality */
+ pcibattach(parent, self, aux);
+}
+
+#ifndef SMALL_KERNEL
+int
+pchpcib_wdt_cb(void *arg, int period)
+{
+ struct pchpcib_softc *sc = arg;
+ u_int32_t preload;
+
+ if (period == 0) {
+ if (sc->sc_wdt_period != 0) {
+ /* Disable watchdog, with a reload before for safety */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, 0);
+ }
+ } else {
+ /* 600 seconds is the maximum supported timeout value */
+ if (period > 600)
+ period = 600;
+ if (sc->sc_wdt_period != period) {
+ /* Set new timeout */
+ preload = (period * 33000000) >> 15;
+ preload--;
+
+ /* Set watchdog to perform a cold reset toggling the
+ * GPIO pin and the timer set to 1ms-10m resolution
+ */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTCR, E600_WDT_WDTCR_ENABLE);
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_PV1, 0);
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_PV2, preload);
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ }
+ if (sc->sc_wdt_period == 0) {
+ /* Enable watchdog */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR, E600_WDT_WDTLR_ENABLE);
+ } else {
+ /* Reset timer */
+ pchpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ }
+ }
+ sc->sc_wdt_period = period;
+
+ return (period);
+}
+#endif /* !SMALL_KERNEL */
--- /dev/null Thu May 24 00:43:40 2012
+++ share/man/man4/man4.i386/pchpcib.4 Thu May 24 00:35:24 2012
@@ -0,0 +1,55 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt PCHPCIB 4 i386
+.Os
+.Sh NAME
+.Nm pchpcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "pchpcib* at pci?"
+.Cd "isa* at pchpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
--- /dev/null Thu May 24 00:43:52 2012
+++ share/man/man4/man4.amd64/pchpcib.4 Thu May 24 00:36:02 2012
@@ -0,0 +1,55 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt PCHPCIB 4 amd64
+.Os
+.Sh NAME
+.Nm pchpcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "pchpcib* at pci?"
+.Cd "isa* at pchpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
--- share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012
+++ share/man/man4/man4.i386/Makefile Thu May 24 00:37:33 2012
@@ -6,7 +6,7 @@
  esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
  ichpcib.4 intro.4 ioapic.4 \
  joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
- pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
+ pas.4 pchpcib.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
  sea.4 uha.4 wds.4 wdt.4 wss.4
 
 MLINKS+= mem.4 kmem.4
--- share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012
+++ share/man/man4/man4.amd64/Makefile Thu May 24 00:36:32 2012
@@ -1,7 +1,7 @@
 # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $
 
 MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \
- mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
+ mem.4 mpbios.4 nvram.4 mtrr.4 pchpcib.4 pctr.4
 
 MLINKS+= mem.4 kmem.4
 MANSUBDIR=amd64
--- sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012
+++ sys/arch/i386/conf/files.i386 Thu May 24 00:38:53 2012
@@ -147,7 +147,7 @@
 # PCI-ISA bridge chipsets
 device pcib: isabus
 attach pcib at pci
-file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib
+file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib | pchpcib
 
 # Intel ICHx/ICHx-M LPC bridges
 device ichpcib: isabus
@@ -168,6 +168,11 @@
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device pchpcib: isabus
+attach pchpcib at pci
+file dev/pci/pchpcib.c pchpcib
 
 device hme: ether, ifnet, mii, ifmedia
 file dev/ic/hme.c hme
--- sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012
+++ sys/arch/amd64/conf/files.amd64 Thu May 24 00:39:35 2012
@@ -147,12 +147,17 @@
 # PCI-ISA bridges
 device pcib: isabus
 attach pcib at pci
-file arch/amd64/pci/pcib.c pcib | amdpcib
+file arch/amd64/pci/pcib.c pcib | amdpcib | pchpcib
 
 # AMD 8111 LPC bridge
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device pchpcib: isabus
+attach pchpcib at pci
+file dev/pci/pchpcib.c pchpcib
 
 device aapic
 attach aapic at pci
--- sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012
+++ sys/arch/i386/conf/GENERIC Thu May 24 00:38:19 2012
@@ -72,6 +72,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at pchpcib?
 isa0 at ichpcib?
 isa0 at piixpcib?
 isa0 at gscpcib?
@@ -85,6 +86,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+pchpcib* at pci? # Intel Atom E600 LPC bridge
 ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges
 piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge
 gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge
--- sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012
+++ sys/arch/amd64/conf/GENERIC Thu May 24 00:39:10 2012
@@ -34,6 +34,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at pchpcib?
 pci* at mainbus0
 
 acpi0 at bios0
@@ -73,6 +74,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+pchpcib* at pci? # Intel Atom E600 LPC bridge
 kate* at pci? # AMD K8 temperature sensor
 km* at pci? # AMD K10 temperature sensor
 amas* at pci? disable # AMD memory configuration

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Re: Intel Atom E600 watchdog(4) support

Mike Belopuhov
On Thu, May 24, 2012 at 12:30 PM, Matt Dainty <[hidden email]> wrote:

> * Jonathan Gray <[hidden email]> [2012-05-24 01:23:28]:
>> As a general policy drivers do not have numbers in their name,
>> so it will have to be renamed.
>
> Yes, I got a couple of private mails stating the same, which explains
> why I hadn't seen any others. Anyway, Mike Belopuhov suggested pchpcib
> as an alternative name so I've renamed the driver to that along with
> the man pages, etc.
>
> Here's the dmesg now:
>
> ---8<---
> pchpcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog
> isa0 at pchpcib0
> ---8<---
>
> Looks much better to me too.
>
>> I'll have a look into trying it on a net6501 I have here with i386.
>
> Thanks, much appreciated.
>
> Updated patch below.
>
> Matt
>

i don't think you need to include SMALL_KERNEL here
as we're not going to add it to ramdisks anyway.  in fact
SMALL_KERNEL can be stripped of all the other *pcib
drivers as we don't (or shouldn't) have them on the
ramdisks anymore.

no need to resend a diff just with this change though.
wait a bit till something else pops up (;

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Re: Intel Atom E600 watchdog(4) support

Jonathan Gray-11
In reply to this post by Matt Dainty
On Thu, May 24, 2012 at 06:30:02AM -0400, Matt Dainty wrote:
> * Jonathan Gray <[hidden email]> [2012-05-24 01:23:28]:
> > As a general policy drivers do not have numbers in their name,
> > so it will have to be renamed.
>
> Yes, I got a couple of private mails stating the same, which explains
> why I hadn't seen any others. Anyway, Mike Belopuhov suggested pchpcib
> as an alternative name so I've renamed the driver to that along with
> the man pages, etc.

I'm not sure what it should be but pch seems a bit wrong, as
the LPC device is part of the E600 chip not the EG20T PCH in this
case.  It isn't clear how compatible this is across the other
chips either.  Is it the sort of thing that is only compatible to
tunnel creek/e600 or other chips as well?

On another recent Atom PCH for example, the NM10 it still has a
LPC controller and the watchdog seems to have a different register layout.

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Re: Intel Atom E600 watchdog(4) support

Mike Belopuhov
On Thu, May 24, 2012 at 1:04 PM, Jonathan Gray <[hidden email]> wrote:

> On Thu, May 24, 2012 at 06:30:02AM -0400, Matt Dainty wrote:
>> * Jonathan Gray <[hidden email]> [2012-05-24 01:23:28]:
>> > As a general policy drivers do not have numbers in their name,
>> > so it will have to be renamed.
>>
>> Yes, I got a couple of private mails stating the same, which explains
>> why I hadn't seen any others. Anyway, Mike Belopuhov suggested pchpcib
>> as an alternative name so I've renamed the driver to that along with
>> the man pages, etc.
>
> I'm not sure what it should be but pch seems a bit wrong, as
> the LPC device is part of the E600 chip not the EG20T PCH in this
> case.  It isn't clear how compatible this is across the other
> chips either.  Is it the sort of thing that is only compatible to
> tunnel creek/e600 or other chips as well?
>
> On another recent Atom PCH for example, the NM10 it still has a
> LPC controller and the watchdog seems to have a different register layout.
>

heh, my bad, i had doubts that wdt was actually part of the cpu...

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Re: Intel Atom E600 watchdog(4) support

Mitja Muženič
In reply to this post by Jonathan Gray-11
Works for me on net6501 on i386 GENERIC and GENERIC.MP

after a succesfull watchdog fire:

e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog,
reboot on timeout

It did fire a bit too early though, my watchdog period was set to 32 seconds
and the machine did reset after 26 seconds on my stopwatch. Similarly, with
a 60 second period it fired after ~50 seconds. Don't know if it really
matters though....

Finally, can you mention that the valid period range is 1-600 seconds? The
code does it right by silently lowering a too-high period to 600, but it
would be nice to have it mentioned in the manpages too.

[msata] # sysctl kern.watchdog.period=1
kern.watchdog.period: 0 -> 1
[msata] # sysctl kern.watchdog.period
kern.watchdog.period=1
[msata] # sysctl kern.watchdog.period=10000
kern.watchdog.period: 1 -> 10000
[msata] # sysctl kern.watchdog.period
kern.watchdog.period=600

Regards, Mitja

P.S. While I was composing this reply some other mails have come through.
How about esixoopcib ? :)

> -----Original Message-----
> From: [hidden email] [mailto:[hidden email]] On Behalf
> Of Jonathan Gray
> Sent: Thursday, May 24, 2012 7:23 AM
> To: Matt Dainty
> Cc: [hidden email]
> Subject: Re: Intel Atom E600 watchdog(4) support
>
> As a general policy drivers do not have numbers in their name,
> so it will have to be renamed.
>
> I'll have a look into trying it on a net6501 I have here with i386.
>
> On Wed, May 23, 2012 at 04:52:03PM -0400, Matt Dainty wrote:
> > Attached are some patches that add support for the watchdog device on
> > boards based on the Intel Atom E600 series such as the Soekris
> net6501.
> >
> > Based on existing drivers such as amdpcib(4), ichpcib(4) and
> ichwdt(4)
> > I've created an e600pcib(4) to override the standard pcib(4) which
> can
> > then access the watchdog device.
> >
> > Here's the original dmesg:
> >
> > ---8<---
> > pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00
> > isa0 at pcib0
> > ---8<---
> >
> > Here's with my changes:
> >
> > ---8<---
> > e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00:
> watchdog
> > isa0 at e600pcib0
> > ---8<---
> >
> > I tested the watchdog by setting kern.watchdog.period to 60 and then
> > breaking into ddb and starting a stopwatch and timing until my
> net6501
> > resets, it take near enough to 60 seconds that I'm happy it's
> working.
> >
> > On a watchdog-triggered reboot, I've done similar to ichwdt(4):
> >
> > ---8<---
> > e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00:
> watchdog, reboot on timeout
> > isa0 at e600pcib0
> > ---8<---
> >
> > I've included the driver itself, man pages, changes to GENERIC and
> the
> > various infrastructure files.
> >
> > I'm using it with GENERIC.MP on amd64 and I compile tested it on
> i386.
> >
> > Any comments?
> >
> > Matt
> >
> > --- /dev/null Wed May 23 21:01:50 2012
> > +++ sys/dev/pci/e600pcib.c Wed May 23 21:00:44 2012
> > @@ -0,0 +1,220 @@
> > +/* $OpenBSD$ */
> > +
> > +/*
> > + * Copyright (c) 2012 Matt Dainty <[hidden email]>
> > + *
> > + * Permission to use, copy, modify, and distribute this software for
> any
> > + * purpose with or without fee is hereby granted, provided that the
> above
> > + * copyright notice and this permission notice appear in all copies.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
> WARRANTIES
> > + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> > + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE
> LIABLE FOR
> > + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY
> DAMAGES
> > + * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS,
> WHETHER IN
> > + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
> ARISING OUT
> > + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> > + */
> > +
> > +/*
> > + * Intel Atom E600 series LPC bridge also containing watchdog
> > + */
> > +
> > +#include <sys/param.h>
> > +#include <sys/systm.h>
> > +#include <sys/device.h>
> > +
> > +#include <machine/bus.h>
> > +
> > +#include <dev/pci/pcireg.h>
> > +#include <dev/pci/pcivar.h>
> > +#include <dev/pci/pcidevs.h>
> > +
> > +#define E600_LPC_SMBA 0x40 /* SMBus Base
Address */
> > +#define E600_LPC_GBA 0x44 /* GPIO Base Address
*/
> > +#define E600_LPC_WDTBA 0x84 /* WDT Base Address
*/
> > +
> > +#define E600_WDT_SIZE 64 /* I/O region size
*/
> > +#define E600_WDT_PV1 0x00 /* Preload Value 1
> Register */
> > +#define E600_WDT_PV2 0x04 /* Preload Value 2
> Register */
> > +#define E600_WDT_RR0 0x0c /* Reload Register 0
*/
> > +#define E600_WDT_RR1 0x0d /* Reload Register 1
*/
> > +#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag
*/
> > +#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag
*/
> > +#define E600_WDT_WDTCR 0x10 /* WDT Configuration
> Register */
> > +#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout
Output
> Enable */
> > +#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable
*/
> > +#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select
*/
> > +#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar
Select
> */
> > +#define E600_WDT_DCR 0x14 /* Down Counter
Register
> */
> > +#define E600_WDT_WDTLR 0x18 /* WDT Lock Register
*/
> > +#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer
Lock
> */
> > +#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer
Enable

> */
> > +#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout
> Configuration */
> > +
> > +struct e600pcib_softc {
> > + struct device sc_dev;
> > +
> > + /* Watchdog interface */
> > + bus_space_tag_t sc_wdt_iot;
> > + bus_space_handle_t sc_wdt_ioh;
> > +
> > + int sc_wdt_period;
> > +};
> > +
> > +struct cfdriver e600pcib_cd = {
> > + NULL, "e600pcib", DV_DULL
> > +};
> > +
> > +int e600pcib_match(struct device *, void *, void *);
> > +void e600pcib_attach(struct device *, struct device *, void *);
> > +
> > +int e600pcib_wdt_cb(void *, int);
> > +
> > +struct cfattach e600pcib_ca = {
> > + sizeof(struct e600pcib_softc), e600pcib_match, e600pcib_attach
> > +};
> > +
> > +/* from arch/<*>/pci/pcib.c */
> > +void pcibattach(struct device *parent, struct device *self, void
> *aux);
> > +
> > +const struct pci_matchid e600pcib_devices[] = {
> > + { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC }
> > +};
> > +
> > +#ifndef SMALL_KERNEL
> > +static __inline void
> > +e600pcib_wdt_unlock(struct e600pcib_softc *sc)
> > +{
> > + /* Register unlocking sequence */
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0,
> 0x80);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0,
> 0x86);
> > +}
> > +#endif /* !SMALL_KERNEL */
> > +
> > +int
> > +e600pcib_match(struct device *parent, void *match, void *aux)
> > +{
> > + if (pci_matchbyid((struct pci_attach_args *)aux,
> e600pcib_devices,
> > +    sizeof(e600pcib_devices) / sizeof(e600pcib_devices[0])))
> > + return (2);
> > +
> > + return (0);
> > +}
> > +
> > +void
> > +e600pcib_attach(struct device *parent, struct device *self, void
> *aux)
> > +{
> > +#ifndef SMALL_KERNEL
> > + struct e600pcib_softc *sc = (struct e600pcib_softc *)self;
> > + struct pci_attach_args *pa = aux;
> > + u_int32_t reg, wdtbase;
> > +
> > + /* Map Watchdog I/O space */
> > + reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA);
> > + wdtbase = reg & 0xffff;
> > + sc->sc_wdt_iot = pa->pa_iot;
> > + if (reg & (1 << 31) && wdtbase) {
> > + if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 ||
> > +    bus_space_map(sc->sc_wdt_iot,
> PCI_MAPREG_IO_ADDR(wdtbase),
> > +    E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) {
> > + printf(": can't map watchdog I/O space");
> > + goto corepcib;
> > + }
> > + printf(": watchdog", wdtbase);
> > +
> > + /* Check for reboot on timeout */
> > + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_RR1);
> > + if (reg & E600_WDT_RR1_TIMEOUT) {
> > + printf(", reboot on timeout");
> > +
> > + /* Clear timeout bit */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_RR1, E600_WDT_RR1_TIMEOUT);
> > + }
> > +
> > + /* Check it's not locked already */
> > + reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_WDTLR);
> > + if (reg & E600_WDT_WDTLR_LOCK) {
> > + printf(", locked");
> > + goto corepcib;
> > + }
> > +
> > + /* Disable watchdog */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_WDTLR, 0);
> > + sc->sc_wdt_period = 0;
> > +
> > + /* Register new watchdog */
> > + wdog_register(sc, e600pcib_wdt_cb);
> > + }
> > +
> > +corepcib:
> > +#endif /* !SMALL_KERNEL */
> > + /* Provide core pcib(4) functionality */
> > + pcibattach(parent, self, aux);
> > +}
> > +
> > +#ifndef SMALL_KERNEL
> > +int
> > +e600pcib_wdt_cb(void *arg, int period)
> > +{
> > + struct e600pcib_softc *sc = arg;
> > + u_int32_t preload;
> > +
> > + if (period == 0) {
> > + if (sc->sc_wdt_period != 0) {
> > + /* Disable watchdog, with a reload before for safety
> */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_WDTLR, 0);
> > + }
> > + } else {
> > + /* 600 seconds is the maximum supported timeout value */
> > + if (period > 600)
> > + period = 600;
> > + if (sc->sc_wdt_period != period) {
> > + /* Set new timeout */
> > + preload = (period * 33000000) >> 15;
> > + preload--;
> > +
> > + /* Set watchdog to perform a cold reset toggling the
> > + * GPIO pin and the timer set to 1ms-10m resolution
> > + */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_WDTCR, E600_WDT_WDTCR_ENABLE);
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_PV1, 0);
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_PV2, preload);
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> > + }
> > + if (sc->sc_wdt_period == 0) {
> > + /* Enable watchdog */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_WDTLR, E600_WDT_WDTLR_ENABLE);
> > + } else {
> > + /* Reset timer */
> > + e600pcib_wdt_unlock(sc);
> > + bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
> > +    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
> > + }
> > + }
> > + sc->sc_wdt_period = period;
> > +
> > + return (period);
> > +}
> > +#endif /* !SMALL_KERNEL */
> > --- /dev/null Wed May 23 21:02:08 2012
> > +++ share/man/man4/man4.i386/e600pcib.4 Wed May 23 20:37:44 2012
> > @@ -0,0 +1,55 @@
> > +.\"     $OpenBSD$
> > +.\"
> > +.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
> > +.\"
> > +.\" Permission to use, copy, modify, and distribute this software
> for any
> > +.\" purpose with or without fee is hereby granted, provided that the
> above
> > +.\" copyright notice and this permission notice appear in all
> copies.
> > +.\"
> > +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
> WARRANTIES
> > +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> > +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE
> LIABLE FOR
> > +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY
> DAMAGES
> > +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
> IN AN
> > +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
> OUT OF
> > +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> > +.\"
> > +.Dd $Mdocdate$
> > +.Dt E600PCIB 4 i386
> > +.Os
> > +.Sh NAME
> > +.Nm e600pcib
> > +.Nd Intel Atom E600 series LPC bridge and watchdog
> > +.Sh SYNOPSIS
> > +.Cd "e600pcib* at pci?"
> > +.Cd "isa* at e600pcib?"
> > +.Sh DESCRIPTION
> > +The
> > +.Nm
> > +driver provides support for the Intel Atom E600 series LPC bridge
> and
> > +provides the standard
> > +.Xr watchdog 4
> > +interface to the watchdog timer and may be used with
> > +.Xr watchdogd 8 .
> > +The watchdog timer can be configured via
> > +.Xr sysctl 8 .
> > +.Pp
> > +Once the watchdog timer resets the CPU, the driver reports it on the
> > +next boot displaying the ``reboot on timeout'' message in the dmesg.
> > +.Sh SEE ALSO
> > +.Xr intro 4 ,
> > +.Xr isa 4 ,
> > +.Xr pci 4 ,
> > +.Xr watchdog 4
> > +.Xr sysctl 8
> > +.Xr watchdogd 8
> > +.Sh HISTORY
> > +The
> > +.Nm
> > +driver first appeared in
> > +.Ox 5.2 .
> > +.Sh AUTHORS
> > +The
> > +.Nm
> > +driver was written by
> > +.An Matt Dainty Aq [hidden email] .
> > --- /dev/null Wed May 23 21:02:17 2012
> > +++ share/man/man4/man4.amd64/e600pcib.4 Wed May 23 20:53:39 2012
> > @@ -0,0 +1,55 @@
> > +.\"     $OpenBSD$
> > +.\"
> > +.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
> > +.\"
> > +.\" Permission to use, copy, modify, and distribute this software
> for any
> > +.\" purpose with or without fee is hereby granted, provided that the
> above
> > +.\" copyright notice and this permission notice appear in all
> copies.
> > +.\"
> > +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
> WARRANTIES
> > +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> > +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE
> LIABLE FOR
> > +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY
> DAMAGES
> > +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
> IN AN
> > +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING
> OUT OF
> > +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> > +.\"
> > +.Dd $Mdocdate$
> > +.Dt E600PCIB 4 amd64
> > +.Os
> > +.Sh NAME
> > +.Nm e600pcib
> > +.Nd Intel Atom E600 series LPC bridge and watchdog
> > +.Sh SYNOPSIS
> > +.Cd "e600pcib* at pci?"
> > +.Cd "isa* at e600pcib?"
> > +.Sh DESCRIPTION
> > +The
> > +.Nm
> > +driver provides support for the Intel Atom E600 series LPC bridge
> and
> > +provides the standard
> > +.Xr watchdog 4
> > +interface to the watchdog timer and may be used with
> > +.Xr watchdogd 8 .
> > +The watchdog timer can be configured via
> > +.Xr sysctl 8 .
> > +.Pp
> > +Once the watchdog timer resets the CPU, the driver reports it on the
> > +next boot displaying the ``reboot on timeout'' message in the dmesg.
> > +.Sh SEE ALSO
> > +.Xr intro 4 ,
> > +.Xr isa 4 ,
> > +.Xr pci 4 ,
> > +.Xr watchdog 4
> > +.Xr sysctl 8
> > +.Xr watchdogd 8
> > +.Sh HISTORY
> > +The
> > +.Nm
> > +driver first appeared in
> > +.Ox 5.2 .
> > +.Sh AUTHORS
> > +The
> > +.Nm
> > +driver was written by
> > +.An Matt Dainty Aq [hidden email] .
> > --- share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012
> > +++ share/man/man4/man4.i386/Makefile Wed May 23 21:04:33 2012
> > @@ -2,9 +2,9 @@
> >  # from: @(#)Makefile 5.1 (Berkeley) 2/12/91
> >  # Id: Makefile,v 1.4 1995/12/14 05:41:38 deraadt Exp $
> >
> > -MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 elansc.4 \
> > - esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 gus.4 ie.4 \
> > - ichpcib.4 intro.4 ioapic.4 \
> > +MAN= amdpcib.4 amdmsr.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4
> \
> > + elansc.4 esm.4 geodesc.4 glxpcib.4 glxsb.4 gscpcib.4 gscpm.4 \
> > + gus.4 ie.4 ichpcib.4 intro.4 ioapic.4 \
> >   joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
> >   pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
> >   sea.4 uha.4 wds.4 wdt.4 wss.4
> > --- share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012
> > +++ share/man/man4/man4.amd64/Makefile Wed May 23 21:05:12 2012
> > @@ -1,7 +1,7 @@
> >  # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $
> >
> > -MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \
> > - mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
> > +MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 e600pcib.4 intro.4
> \
> > + ioapic.4 mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
> >
> >  MLINKS+= mem.4 kmem.4
> >  MANSUBDIR=amd64
> > --- sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012
> > +++ sys/arch/i386/conf/files.i386 Wed May 23 18:20:09 2012
> > @@ -147,7 +147,7 @@
> >  # PCI-ISA bridge chipsets
> >  device pcib: isabus
> >  attach pcib at pci
> > -file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib |
> glxpcib | piixpcib | amdpcib
> > +file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib |
> glxpcib | piixpcib | amdpcib | e600pcib
> >
> >  # Intel ICHx/ICHx-M LPC bridges
> >  device ichpcib: isabus
> > @@ -168,6 +168,11 @@
> >  device amdpcib: isabus
> >  attach amdpcib at pci
> >  file dev/pci/amdpcib.c amdpcib
> > +
> > +# Intel Atom E600 LPC bridge
> > +device e600pcib: isabus
> > +attach e600pcib at pci
> > +file dev/pci/e600pcib.c e600pcib
> >
> >  device hme: ether, ifnet, mii, ifmedia
> >  file dev/ic/hme.c hme
> > --- sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012
> > +++ sys/arch/i386/conf/GENERIC Wed May 23 18:19:26 2012
> > @@ -72,6 +72,7 @@
> >  isa0 at mainbus0
> >  isa0 at pcib?
> >  isa0 at amdpcib?
> > +isa0 at e600pcib?
> >  isa0 at ichpcib?
> >  isa0 at piixpcib?
> >  isa0 at gscpcib?
> > @@ -85,6 +86,7 @@
> >  pci* at pchb?
> >  pcib* at pci? # PCI-ISA bridge
> >  amdpcib* at pci? # AMD 8111 LPC bridge
> > +e600pcib* at pci? # Intel Atom E600 LPC bridge
> >  ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges
> >  piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge
> >  gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge
> > --- sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012
> > +++ sys/arch/amd64/conf/files.amd64 Wed May 23 14:17:00 2012
> > @@ -147,12 +147,17 @@
> >  # PCI-ISA bridges
> >  device pcib: isabus
> >  attach pcib at pci
> > -file arch/amd64/pci/pcib.c pcib | amdpcib
> > +file arch/amd64/pci/pcib.c pcib | amdpcib |
> e600pcib
> >
> >  # AMD 8111 LPC bridge
> >  device amdpcib: isabus
> >  attach amdpcib at pci
> >  file dev/pci/amdpcib.c amdpcib
> > +
> > +# Intel Atom E600 LPC bridge
> > +device e600pcib: isabus
> > +attach e600pcib at pci
> > +file dev/pci/e600pcib.c e600pcib
> >
> >  device aapic
> >  attach aapic at pci
> > --- sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012
> > +++ sys/arch/amd64/conf/GENERIC Wed May 23 14:17:18 2012
> > @@ -34,6 +34,7 @@
> >  isa0 at mainbus0
> >  isa0 at pcib?
> >  isa0 at amdpcib?
> > +isa0 at e600pcib?
> >  pci* at mainbus0
> >
> >  acpi0 at bios0
> > @@ -73,6 +74,7 @@
> >  pci* at pchb?
> >  pcib* at pci? # PCI-ISA bridge
> >  amdpcib* at pci? # AMD 8111 LPC bridge
> > +e600pcib* at pci? # Intel Atom E600 LPC bridge
> >  kate* at pci? # AMD K8 temperature sensor
> >  km* at pci? # AMD K10 temperature sensor
> >  amas* at pci? disable # AMD memory configuration

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Re: Intel Atom E600 watchdog(4) support

Mark Kettenis
In reply to this post by Matt Dainty
> Date: Thu, 24 May 2012 06:30:02 -0400
> From: Matt Dainty <[hidden email]>
>
> * Jonathan Gray <[hidden email]> [2012-05-24 01:23:28]:
> > As a general policy drivers do not have numbers in their name,
> > so it will have to be renamed.
>
> Yes, I got a couple of private mails stating the same, which explains
> why I hadn't seen any others. Anyway, Mike Belopuhov suggested pchpcib
> as an alternative name so I've renamed the driver to that along with
> the man pages, etc.

No, pchpcib is inappropriate.  This device is part of the CPU itself,
not on EG20T Platform Controller Hub companion chip.

> ---8<---
> pchpcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog
> isa0 at pchpcib0
> ---8<---

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Re: Intel Atom E600 watchdog(4) support

Matt Dainty
In reply to this post by Mitja Muženič
* Mitja MuE>eniD
 <[hidden email]> [2012-05-24 07:23:22]:

> Works for me on net6501 on i386 GENERIC and GENERIC.MP
>
> after a succesfull watchdog fire:
>
> e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog,
> reboot on timeout
>
> It did fire a bit too early though, my watchdog period was set to 32 seconds
> and the machine did reset after 26 seconds on my stopwatch. Similarly, with
> a 60 second period it fired after ~50 seconds. Don't know if it really
> matters though....

Looking at the watchdog code, it looks like the kernel will refresh the
timer every period / 2, so for a 60 second timeout, it could fire
anywhere between 30-60 seconds after the host hangs.

> Finally, can you mention that the valid period range is 1-600 seconds? The
> code does it right by silently lowering a too-high period to 600, but it
> would be nice to have it mentioned in the manpages too.

Yes, that makes sense.

> P.S. While I was composing this reply some other mails have come through.
> How about esixoopcib ? :)

Better than esixhundredpcib ;-)

Does anyone have any suggestions? e6xxpcib? atompcib? iatcpcib?

Matt

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Re: Intel Atom E600 watchdog(4) support

Mark Kettenis
> Date: Thu, 24 May 2012 08:47:52 -0400
> From: Matt Dainty <[hidden email]>
>
> * Mitja MuE>eniD
 <[hidden email]> [2012-05-24 07:23:22]:

> > Works for me on net6501 on i386 GENERIC and GENERIC.MP
> >
> > after a succesfull watchdog fire:
> >
> > e600pcib0 at pci0 dev 31 function 0 "Intel E600 LPC" rev 0x00: watchdog,
> > reboot on timeout
> >
> > It did fire a bit too early though, my watchdog period was set to 32 seconds
> > and the machine did reset after 26 seconds on my stopwatch. Similarly, with
> > a 60 second period it fired after ~50 seconds. Don't know if it really
> > matters though....
>
> Looking at the watchdog code, it looks like the kernel will refresh the
> timer every period / 2, so for a 60 second timeout, it could fire
> anywhere between 30-60 seconds after the host hangs.
>
> > Finally, can you mention that the valid period range is 1-600 seconds? The
> > code does it right by silently lowering a too-high period to 600, but it
> > would be nice to have it mentioned in the manpages too.
>
> Yes, that makes sense.
>
> > P.S. While I was composing this reply some other mails have come through.
> > How about esixoopcib ? :)
>
> Better than esixhundredpcib ;-)
>
> Does anyone have any suggestions? e6xxpcib? atompcib? iatcpcib?

We typically prefer shorter names.  tcpcib might not be such a bad name.

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Re: Intel Atom E600 watchdog(4) support

Miod Vallat
> We typically prefer shorter names.  tcpcib might not be such a bad name.

Come on. It obviously has to be "yapcib" since it's yet another pcib.

Miod

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Re: Intel Atom E600 watchdog(4) support

Matt Dainty
* Miod Vallat <[hidden email]> [2012-05-24 09:30:37]:
> >We typically prefer shorter names.  tcpcib might not be such a bad name.
>
> Come on. It obviously has to be "yapcib" since it's yet another pcib.

Third time lucky, I've renamed the driver to tcpcib, (as much as I'd
love to call it yapcib ;-).

Theo suggested I add code to handle suspend/resume so I've done that
although I can't test it as my net6501 doesn't suspend, although the
code simply stops the watchdog if it's running at suspend time and
starts it up again come resume time. I presume that's ok?

I also documented the maximum period supported by the watchdog timer
and also made a note of the lack of driver support for any other parts
of the hardware.

Matt

--- /dev/null Thu May 24 22:49:02 2012
+++ /usr/src/sys/dev/pci/tcpcib.c Thu May 24 22:48:17 2012
@@ -0,0 +1,264 @@
+/* $OpenBSD$ */
+
+/*
+ * Copyright (c) 2012 Matt Dainty <[hidden email]>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Intel Atom E600 series LPC bridge also containing watchdog
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#define E600_LPC_SMBA 0x40 /* SMBus Base Address */
+#define E600_LPC_GBA 0x44 /* GPIO Base Address */
+#define E600_LPC_WDTBA 0x84 /* WDT Base Address */
+
+#define E600_WDT_SIZE 64 /* I/O region size */
+#define E600_WDT_PV1 0x00 /* Preload Value 1 Register */
+#define E600_WDT_PV2 0x04 /* Preload Value 2 Register */
+#define E600_WDT_RR0 0x0c /* Reload Register 0 */
+#define E600_WDT_RR1 0x0d /* Reload Register 1 */
+#define E600_WDT_RR1_RELOAD (1 << 0) /* WDT Reload Flag */
+#define E600_WDT_RR1_TIMEOUT (1 << 1) /* WDT Timeout Flag */
+#define E600_WDT_WDTCR 0x10 /* WDT Configuration Register */
+#define E600_WDT_WDTCR_PRE (1 << 2) /* WDT Prescalar Select */
+#define E600_WDT_WDTCR_RESET (1 << 3) /* WDT Reset Select */
+#define E600_WDT_WDTCR_ENABLE (1 << 4) /* WDT Reset Enable */
+#define E600_WDT_WDTCR_TIMEOUT (1 << 5) /* WDT Timeout Output Enable */
+#define E600_WDT_DCR 0x14 /* Down Counter Register */
+#define E600_WDT_WDTLR 0x18 /* WDT Lock Register */
+#define E600_WDT_WDTLR_LOCK (1 << 0) /* Watchdog Timer Lock */
+#define E600_WDT_WDTLR_ENABLE (1 << 1) /* Watchdog Timer Enable */
+#define E600_WDT_WDTLR_TIMEOUT (1 << 2) /* WDT Timeout Configuration */
+
+struct tcpcib_softc {
+ struct device sc_dev;
+
+ /* Keep track of which parts of the hardware are active */
+ int sc_active;
+#define E600_WDT_ACTIVE (1 << 0)
+
+ /* Watchdog interface */
+ bus_space_tag_t sc_wdt_iot;
+ bus_space_handle_t sc_wdt_ioh;
+
+ int sc_wdt_period;
+};
+
+struct cfdriver tcpcib_cd = {
+ NULL, "tcpcib", DV_DULL
+};
+
+int tcpcib_match(struct device *, void *, void *);
+void tcpcib_attach(struct device *, struct device *, void *);
+int tcpcib_activate(struct device *, int);
+
+int tcpcib_wdt_cb(void *, int);
+
+struct cfattach tcpcib_ca = {
+ sizeof(struct tcpcib_softc), tcpcib_match, tcpcib_attach,
+ NULL, tcpcib_activate
+};
+
+/* from arch/<*>/pci/pcib.c */
+void pcibattach(struct device *parent, struct device *self, void *aux);
+
+const struct pci_matchid tcpcib_devices[] = {
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC }
+};
+
+static __inline void
+tcpcib_wdt_unlock(struct tcpcib_softc *sc)
+{
+ /* Register unlocking sequence */
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x80);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR0, 0x86);
+}
+
+static void
+tcpcib_wdt_init(struct tcpcib_softc *sc, int period)
+{
+ u_int32_t preload;
+
+ /* Set new timeout */
+ preload = (period * 33000000) >> 15;
+ preload--;
+
+ /* Set watchdog to perform a cold reset toggling the GPIO pin and the
+ * prescaler set to 1ms-10m resolution
+ */
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_WDTCR,
+    E600_WDT_WDTCR_ENABLE);
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_PV1, 0);
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_4(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_PV2,
+    preload);
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR1,
+    E600_WDT_RR1_RELOAD);
+}
+
+static void
+tcpcib_wdt_start(struct tcpcib_softc *sc)
+{
+ /* Enable watchdog */
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_WDTLR,
+    E600_WDT_WDTLR_ENABLE);
+}
+
+static void
+tcpcib_wdt_stop(struct tcpcib_softc *sc)
+{
+ /* Disable watchdog, with a reload before for safety */
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_RR1,
+    E600_WDT_RR1_RELOAD);
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh, E600_WDT_WDTLR, 0);
+}
+
+int
+tcpcib_match(struct device *parent, void *match, void *aux)
+{
+ if (pci_matchbyid((struct pci_attach_args *)aux, tcpcib_devices,
+    sizeof(tcpcib_devices) / sizeof(tcpcib_devices[0])))
+ return (2);
+
+ return (0);
+}
+
+void
+tcpcib_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct tcpcib_softc *sc = (struct tcpcib_softc *)self;
+ struct pci_attach_args *pa = aux;
+ u_int32_t reg, wdtbase;
+
+ sc->sc_active = 0;
+
+ /* Map Watchdog I/O space */
+ reg = pci_conf_read(pa->pa_pc, pa->pa_tag, E600_LPC_WDTBA);
+ wdtbase = reg & 0xffff;
+ sc->sc_wdt_iot = pa->pa_iot;
+ if (reg & (1 << 31) && wdtbase) {
+ if (PCI_MAPREG_IO_ADDR(wdtbase) == 0 ||
+    bus_space_map(sc->sc_wdt_iot, PCI_MAPREG_IO_ADDR(wdtbase),
+    E600_WDT_SIZE, 0, &sc->sc_wdt_ioh)) {
+ printf(": can't map watchdog I/O space");
+ goto corepcib;
+ }
+ printf(": watchdog");
+
+ /* Check for reboot on timeout */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1);
+ if (reg & E600_WDT_RR1_TIMEOUT) {
+ printf(", reboot on timeout");
+
+ /* Clear timeout bit */
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_TIMEOUT);
+ }
+
+ /* Check it's not locked already */
+ reg = bus_space_read_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_WDTLR);
+ if (reg & E600_WDT_WDTLR_LOCK) {
+ printf(", locked");
+ goto corepcib;
+ }
+
+ /* Disable watchdog */
+ tcpcib_wdt_stop(sc);
+ sc->sc_wdt_period = 0;
+
+ sc->sc_active |= E600_WDT_ACTIVE;
+
+ /* Register new watchdog */
+ wdog_register(sc, tcpcib_wdt_cb);
+ }
+
+corepcib:
+ /* Provide core pcib(4) functionality */
+ pcibattach(parent, self, aux);
+}
+
+int
+tcpcib_activate(struct device *self, int act)
+{
+ struct tcpcib_softc *sc = (struct tcpcib_softc *)self;
+
+ switch (act) {
+ case DVACT_SUSPEND:
+ /* Watchdog is running, disable it */
+ if (sc->sc_active & E600_WDT_ACTIVE && sc->sc_wdt_period != 0)
+ tcpcib_wdt_stop(sc);
+ break;
+ case DVACT_RESUME:
+ if (sc->sc_active & E600_WDT_ACTIVE) {
+ /* Watchdog was running prior to suspend so reenable
+ * it, otherwise make sure it stays disabled
+ */
+ if (sc->sc_wdt_period != 0) {
+ tcpcib_wdt_init(sc, sc->sc_wdt_period);
+ tcpcib_wdt_start(sc);
+ } else
+ tcpcib_wdt_stop(sc);
+ }
+ break;
+ }
+ return (0);
+}
+
+int
+tcpcib_wdt_cb(void *arg, int period)
+{
+ struct tcpcib_softc *sc = arg;
+
+ if (period == 0) {
+ if (sc->sc_wdt_period != 0)
+ tcpcib_wdt_stop(sc);
+ } else {
+ /* 600 seconds is the maximum supported timeout value */
+ if (period > 600)
+ period = 600;
+ if (sc->sc_wdt_period != period)
+ tcpcib_wdt_init(sc, period);
+ if (sc->sc_wdt_period == 0) {
+ tcpcib_wdt_start(sc);
+ } else {
+ /* Reset timer */
+ tcpcib_wdt_unlock(sc);
+ bus_space_write_1(sc->sc_wdt_iot, sc->sc_wdt_ioh,
+    E600_WDT_RR1, E600_WDT_RR1_RELOAD);
+ }
+ }
+ sc->sc_wdt_period = period;
+
+ return (period);
+}
--- /dev/null Thu May 24 22:49:45 2012
+++ /usr/src/share/man/man4/man4.i386/tcpcib.4 Thu May 24 22:26:27 2012
@@ -0,0 +1,64 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt TCPCIB 4 i386
+.Os
+.Sh NAME
+.Nm tcpcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "tcpcib* at pci?"
+.Cd "isa* at tcpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh NOTES
+The maximum timeout value supported by the watchdog timer is 600
+seconds.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
+.Sh BUGS
+Apart from the core
+.Xr pcib 4
+functionality and the
+.Xr watchdog 4
+interface, the driver doesn't support any other aspects of the hardware.
--- /dev/null Thu May 24 22:49:52 2012
+++ /usr/src/share/man/man4/man4.amd64/tcpcib.4 Thu May 24 22:28:02 2012
@@ -0,0 +1,64 @@
+.\"     $OpenBSD$
+.\"
+.\" Copyright (c) 2012 Matt Dainty <[hidden email]>
+.\"
+.\" Permission to use, copy, modify, and distribute this software for any
+.\" purpose with or without fee is hereby granted, provided that the above
+.\" copyright notice and this permission notice appear in all copies.
+.\"
+.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\"
+.Dd $Mdocdate$
+.Dt TCPCIB 4 amd64
+.Os
+.Sh NAME
+.Nm tcpcib
+.Nd Intel Atom E600 series LPC bridge and watchdog
+.Sh SYNOPSIS
+.Cd "tcpcib* at pci?"
+.Cd "isa* at tcpcib?"
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for the Intel Atom E600 series LPC bridge and
+provides the standard
+.Xr watchdog 4
+interface to the watchdog timer and may be used with
+.Xr watchdogd 8 .
+The watchdog timer can be configured via
+.Xr sysctl 8 .
+.Pp
+Once the watchdog timer resets the CPU, the driver reports it on the
+next boot displaying the ``reboot on timeout'' message in the dmesg.
+.Sh NOTES
+The maximum timeout value supported by the watchdog timer is 600
+seconds.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr isa 4 ,
+.Xr pci 4 ,
+.Xr watchdog 4
+.Xr sysctl 8
+.Xr watchdogd 8
+.Sh HISTORY
+The
+.Nm
+driver first appeared in
+.Ox 5.2 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An Matt Dainty Aq [hidden email] .
+.Sh BUGS
+Apart from the core
+.Xr pcib 4
+functionality and the
+.Xr watchdog 4
+interface, the driver doesn't support any other aspects of the hardware.
--- /usr/src/share/man/man4/man4.i386/Makefile.orig Wed May 23 21:03:38 2012
+++ /usr/src/share/man/man4/man4.i386/Makefile Thu May 24 10:32:29 2012
@@ -7,7 +7,7 @@
  ichpcib.4 intro.4 ioapic.4 \
  joy.4 le.4 lms.4 mem.4 mms.4 mpbios.4 mtrr.4 npx.4 nvram.4 \
  pas.4 pcibios.4 pctr.4 piixpcib.4 sb.4 \
- sea.4 uha.4 wds.4 wdt.4 wss.4
+ sea.4 tcpcib.4 uha.4 wds.4 wdt.4 wss.4
 
 MLINKS+= mem.4 kmem.4
 MANSUBDIR=i386
--- /usr/src/share/man/man4/man4.amd64/Makefile.orig Wed May 23 21:04:42 2012
+++ /usr/src/share/man/man4/man4.amd64/Makefile Thu May 24 10:34:18 2012
@@ -1,7 +1,7 @@
 # $OpenBSD: Makefile,v 1.14 2011/03/18 12:40:29 deraadt Exp $
 
 MAN= amdpcib.4 apm.4 autoconf.4 bios.4 cpu.4 intro.4 ioapic.4 \
- mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4
+ mem.4 mpbios.4 nvram.4 mtrr.4 pctr.4 tcpcib.4
 
 MLINKS+= mem.4 kmem.4
 MANSUBDIR=amd64
--- /usr/src/sys/arch/i386/conf/files.i386.orig Wed May 23 18:18:01 2012
+++ /usr/src/sys/arch/i386/conf/files.i386 Thu May 24 10:38:10 2012
@@ -147,7 +147,7 @@
 # PCI-ISA bridge chipsets
 device pcib: isabus
 attach pcib at pci
-file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib
+file arch/i386/pci/pcib.c pcib | ichpcib | gscpcib | glxpcib | piixpcib | amdpcib | tcpcib
 
 # Intel ICHx/ICHx-M LPC bridges
 device ichpcib: isabus
@@ -168,6 +168,11 @@
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device tcpcib: isabus
+attach tcpcib at pci
+file dev/pci/tcpcib.c tcpcib
 
 device hme: ether, ifnet, mii, ifmedia
 file dev/ic/hme.c hme
--- /usr/src/sys/arch/i386/conf/GENERIC.orig Wed May 23 18:17:57 2012
+++ /usr/src/sys/arch/i386/conf/GENERIC Thu May 24 10:40:15 2012
@@ -72,6 +72,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at tcpcib?
 isa0 at ichpcib?
 isa0 at piixpcib?
 isa0 at gscpcib?
@@ -85,6 +86,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+tcpcib* at pci? # Intel Atom E600 LPC bridge
 ichpcib* at pci? # Intel ICHx/ICHx-M LPC bridges
 piixpcib* at pci? # Intel PIIX4 PCI-ISA bridge
 gscpcib* at pci? # NS Geode SC1100 PCI-ISA bridge
--- /usr/src/sys/arch/amd64/conf/files.amd64.orig Wed May 23 14:16:11 2012
+++ /usr/src/sys/arch/amd64/conf/files.amd64 Thu May 24 10:42:17 2012
@@ -147,12 +147,17 @@
 # PCI-ISA bridges
 device pcib: isabus
 attach pcib at pci
-file arch/amd64/pci/pcib.c pcib | amdpcib
+file arch/amd64/pci/pcib.c pcib | amdpcib | tcpcib
 
 # AMD 8111 LPC bridge
 device amdpcib: isabus
 attach amdpcib at pci
 file dev/pci/amdpcib.c amdpcib
+
+# Intel Atom E600 LPC bridge
+device tcpcib: isabus
+attach tcpcib at pci
+file dev/pci/tcpcib.c tcpcib
 
 device aapic
 attach aapic at pci
--- /usr/src/sys/arch/amd64/conf/GENERIC.orig Wed May 23 12:29:16 2012
+++ /usr/src/sys/arch/amd64/conf/GENERIC Thu May 24 10:43:26 2012
@@ -34,6 +34,7 @@
 isa0 at mainbus0
 isa0 at pcib?
 isa0 at amdpcib?
+isa0 at tcpcib?
 pci* at mainbus0
 
 acpi0 at bios0
@@ -73,6 +74,7 @@
 pci* at pchb?
 pcib* at pci? # PCI-ISA bridge
 amdpcib* at pci? # AMD 8111 LPC bridge
+tcpcib* at pci? # Intel Atom E600 LPC bridge
 kate* at pci? # AMD K8 temperature sensor
 km* at pci? # AMD K10 temperature sensor
 amas* at pci? disable # AMD memory configuration

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Re: Intel Atom E600 watchdog(4) support

Jonathan Gray-11
On Fri, May 25, 2012 at 08:23:48PM -0400, Matt Dainty wrote:

> * Miod Vallat <[hidden email]> [2012-05-24 09:30:37]:
> > >We typically prefer shorter names.  tcpcib might not be such a bad name.
> >
> > Come on. It obviously has to be "yapcib" since it's yet another pcib.
>
> Third time lucky, I've renamed the driver to tcpcib, (as much as I'd
> love to call it yapcib ;-).
>
> Theo suggested I add code to handle suspend/resume so I've done that
> although I can't test it as my net6501 doesn't suspend, although the
> code simply stops the watchdog if it's running at suspend time and
> starts it up again come resume time. I presume that's ok?
>
> I also documented the maximum period supported by the watchdog timer
> and also made a note of the lack of driver support for any other parts
> of the hardware.
>
> Matt

Thanks, committed with the multiline comments knf'd and static
removed as pointed out by kettenis.

And tested here on a net6501 running i386.